mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
19f589923a
Add a MISC driver with read and write access to BSEC IP (Boot and Security and OTP control) - offset 0: shadowed values - offset 0x80000000: OTP fuse box values (SAFMEM) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
17 lines
312 B
Makefile
17 lines
312 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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#
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obj-y += cpu.o
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obj-y += dram_init.o
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obj-y += syscon.o
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ifdef CONFIG_SPL_BUILD
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obj-y += spl.o
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else
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obj-y += bsec.o
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endif
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obj-$(CONFIG_ARMV7_PSCI) += psci.o
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obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o
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