mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 13:16:16 +09:00
81ea00838c
When an operating system started via bootefi tries to reset or power off this is done by calling the EFI runtime ResetSystem(). On most ARMv8 system the actual reset relies on PSCI. Depending on whether the PSCI firmware resides the hypervisor (EL2) or in the secure monitor (EL3) either an HVC or an SMC command has to be issued. The current implementation always uses SMC. This results in crashes on systems where the PSCI firmware is implemented in the hypervisor, e.g. qemu-arm64_defconfig. The logic to decide which call is needed based on the device tree is already implemented in the PSCI firmware driver. During the EFI runtime the device driver model is not available. But we can minimize code duplication by merging the EFI runtime reset and poweroff code with the PSCI firmware driver. As the same HVC/SMC problem is also evident for the ARMv8 do_poweroff and reset_misc routines let's move them into the same code module. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
116 lines
2.2 KiB
C
116 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/**
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* (C) Copyright 2014, Cavium Inc.
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* (C) Copyright 2017, Xilinx Inc.
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*
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**/
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#include <asm-offsets.h>
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#include <config.h>
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#include <version.h>
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#include <asm/macro.h>
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#include <asm/psci.h>
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#include <asm/system.h>
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/*
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* Issue the hypervisor call
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*
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* x0~x7: input arguments
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* x0~x3: output arguments
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*/
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static void hvc_call(struct pt_regs *args)
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{
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asm volatile(
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"ldr x0, %0\n"
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"ldr x1, %1\n"
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"ldr x2, %2\n"
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"ldr x3, %3\n"
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"ldr x4, %4\n"
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"ldr x5, %5\n"
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"ldr x6, %6\n"
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"ldr x7, %7\n"
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"hvc #0\n"
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"str x0, %0\n"
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"str x1, %1\n"
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"str x2, %2\n"
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"str x3, %3\n"
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: "+m" (args->regs[0]), "+m" (args->regs[1]),
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"+m" (args->regs[2]), "+m" (args->regs[3])
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: "m" (args->regs[4]), "m" (args->regs[5]),
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"m" (args->regs[6]), "m" (args->regs[7])
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: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17");
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}
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/*
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* void smc_call(arg0, arg1...arg7)
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*
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* issue the secure monitor call
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*
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* x0~x7: input arguments
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* x0~x3: output arguments
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*/
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void smc_call(struct pt_regs *args)
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{
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asm volatile(
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"ldr x0, %0\n"
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"ldr x1, %1\n"
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"ldr x2, %2\n"
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"ldr x3, %3\n"
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"ldr x4, %4\n"
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"ldr x5, %5\n"
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"ldr x6, %6\n"
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"smc #0\n"
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"str x0, %0\n"
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"str x1, %1\n"
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"str x2, %2\n"
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"str x3, %3\n"
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: "+m" (args->regs[0]), "+m" (args->regs[1]),
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"+m" (args->regs[2]), "+m" (args->regs[3])
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: "m" (args->regs[4]), "m" (args->regs[5]),
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"m" (args->regs[6])
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: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17");
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}
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/*
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* For now, all systems we support run at least in EL2 and thus
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* trigger PSCI calls to EL3 using SMC. If anyone ever wants to
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* use PSCI on U-Boot running below a hypervisor, please detect
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* this and set the flag accordingly.
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*/
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static const bool use_smc_for_psci = true;
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void __noreturn psci_system_reset(void)
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{
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struct pt_regs regs;
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regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
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if (use_smc_for_psci)
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smc_call(®s);
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else
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hvc_call(®s);
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while (1)
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;
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}
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void __noreturn psci_system_off(void)
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{
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struct pt_regs regs;
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regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_OFF;
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if (use_smc_for_psci)
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smc_call(®s);
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else
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hvc_call(®s);
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while (1)
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;
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}
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