Lukas Auer 8176ea4d58 riscv: add Kconfig entries for the code model ... RISC-V has two code models, medium low (medlow) and medium any (medany). Medlow limits addressable memory to a single 2 GiB range between the absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory to any single 2 GiB address range. By default, medlow is selected for U-Boot on both 32-bit and 64-bit systems. The -mcmodel compiler flag is selected according to the Kconfig configuration. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> [bmeng: adjust to make medlow the default code model for U-Boot] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org>		2018-12-18 09:56:26 +08:00
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cpu	riscv: ax25-ae350: Pass dtb address to u-boot with a1 register	2018-12-05 14:14:16 +08:00
dts	riscv: dts: Add ae350_32.dts for RV32I	2018-11-26 13:57:55 +08:00
include/asm	riscv: Add kconfig option to run U-Boot in S-mode	2018-12-05 14:13:53 +08:00
lib	riscv: Add kconfig option to run U-Boot in S-mode	2018-12-05 14:13:53 +08:00
config.mk	riscv: enable -fdata-sections	2018-11-26 13:57:29 +08:00
Kconfig	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00