Stephen Warren 8165e34bf4 usb: ehci: fully align interrupt QHs/QTDs ... These data structures are passed to cache-flushing routines, and hence must be conform to both the USB the cache-flusing alignment requirements. That means aligning to USB_DMA_MINALIGN. This is important on systems where cache lines are >32 bytes. Signed-off-by: Stephen Warren <swarren@nvidia.com>		2014-03-10 18:53:36 +01:00
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eth	net: asix: don't pad odd-length TX packets	2014-03-07 10:59:06 -05:00
gadget	sizes.h - consolidate for all architectures	2014-03-04 12:15:01 -05:00
host	usb: ehci: fully align interrupt QHs/QTDs	2014-03-10 18:53:36 +01:00
musb	blackfin: Add <asm/clock.h> to numerous drivers	2014-02-20 12:00:27 -05:00
musb-new	kbuild: use Linux Kernel build scripts	2014-02-19 11:07:50 -05:00
phy	drivers: usb: convert makefiles to Kbuild style	2013-10-31 13:25:38 -04:00
ulpi	drivers: usb: convert makefiles to Kbuild style	2013-10-31 13:25:38 -04:00