mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-20 11:40:25 +09:00
a6b1e25fc6
At the moment, the desired brownout is at 1.0V. However, this setting cannot be realized by hardware since we have only 3 bits to represent the voltage difference from the target value. Target value is 1500 mV, brownout target is 1000 mV, voltage steps are 25 mV. Register content calculation: (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14 Register takes only 3 bits, that is 0x4. But 0x4 * 25 [mV] = 100 [mV], that means that actual brownout level is 1500 [mV] - 100 [mV] = 1.4 V. Minimum possible BO level is 1500 [mV] - 0x7 * 25 [mV] = 1315 [mV]. So lets use this value as desired BO value (which is also the same as FSL bootlets use). Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> |
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| .. | ||
| clock.c | ||
| iomux.c | ||
| Makefile | ||
| mxs_init.h | ||
| mxs.c | ||
| mxsimage-signed.cfg | ||
| mxsimage.mx23.cfg | ||
| mxsimage.mx28.cfg | ||
| spl_boot.c | ||
| spl_lradc_init.c | ||
| spl_mem_init.c | ||
| spl_power_init.c | ||
| start.S | ||
| timer.c | ||
| u-boot-imx23.bd | ||
| u-boot-imx28.bd | ||
| u-boot-spl.lds | ||