mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
b45db3b590
This framework is introduced for ARMv8 secure monitor mode firmware. The main functions of the framework are, on EL3, verify the firmware, load it to the secure memory and jump into it, and while it returned to U-Boot, do some necessary setups at the 'target exception level' that is determined by the respective secure firmware. So far, the framework support only FIT format image, and need to define the name of which config node should be used in 'configurations' and the name of property for the raw secure firmware image in that config. The FIT image should be stored in Byte accessing memory, such as NOR Flash, or else it should be copied to main memory to use this framework. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
54 lines
968 B
ArmAsm
54 lines
968 B
ArmAsm
/*
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* Copyright 2016 NXP Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <linux/linkage.h>
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#include <asm/system.h>
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#include <asm/macro.h>
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WEAK(_sec_firmware_entry)
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/*
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* x0: Secure Firmware entry point
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* x1: Exception return address Low
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* x2: Exception return address High
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*/
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/* Save stack pointer for EL2 */
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mov x3, sp
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msr sp_el2, x3
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/* Set exception return address hold pointer */
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adr x4, 1f
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mov x3, x4
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#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
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rev w3, w3
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#endif
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str w3, [x1]
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lsr x3, x4, #32
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#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
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rev w3, w3
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#endif
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str w3, [x2]
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/* Call SEC monitor */
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br x0
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1:
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mov x0, #0
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ret
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ENDPROC(_sec_firmware_entry)
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#ifdef CONFIG_ARMV8_PSCI
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ENTRY(_sec_firmware_support_psci_version)
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mov x0, 0x84000000
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mov x1, 0x0
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mov x2, 0x0
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mov x3, 0x0
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smc #0
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ret
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ENDPROC(_sec_firmware_support_psci_version)
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#endif
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