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https://github.com/brain-hackers/u-boot-brain
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![Stefan Roese](/assets/img/avatar_default.png)
Currently the mtdparts commands are included in the jffs2 command support. This doesn't make sense anymore since other commands (e.g. UBI) use this infrastructure as well now. This patch separates the mtdparts commands from the jffs2 commands making it possible to only select mtdparts when no JFFS2 support is needed. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
243 lines
7.8 KiB
C
243 lines
7.8 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define GRUSS_TESTING
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_X86 1 /* This is a X86 CPU */
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#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
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#define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */
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#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
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#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
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#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */
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/* define at most one of these */
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#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
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#define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
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#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
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#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */
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#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */
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#define CONFIG_SYS_GENERIC_TIMER 1 /* use the i8254 PIT timers */
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#undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */
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#define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those
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* in the SC520 on the CDP */
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#define CONFIG_SYS_PCAT_INTERRUPTS
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#define CONFIG_SYS_NUM_IRQS 16
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#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
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#define CONFIG_SHOW_BOOT_PROGRESS 1
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#define CONFIG_LAST_STAGE_INIT 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_BAUDRATE 9600
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PCI
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#ifndef GRUSS_TESTING
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#define CONFIG_CMD_SATA
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#else
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#undef CONFIG_CMD_SATA
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#endif
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_EEPROM
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#define CONFIG_BOOTDELAY 15
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#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
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/* #define CONFIG_BOOTCOMMAND "bootm 38000000" */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
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#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
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#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */
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#define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Environment in EEPROM */
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#define CONFIG_ENV_IS_IN_EEPROM 1
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#define CONFIG_SPI
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#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
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#define CONFIG_ENV_OFFSET 0
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#define CONFIG_SYS_SC520_CDP_USE_SPI /* Store configuration in the SPI part */
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#undef CONFIG_SYS_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */
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#define CONFIG_SPI_X 1
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/*
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* JFFS2 partitions
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*/
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/* No command line, one static partition, whole device */
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#undef CONFIG_CMD_MTDPARTS
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#define CONFIG_JFFS2_DEV "nor0"
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#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
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#define CONFIG_JFFS2_PART_OFFSET 0x00000000
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/* mtdparts command line support */
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/*
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#define CONFIG_CMD_MTDPARTS
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#define MTDIDS_DEFAULT "nor0=SC520CDP Flash Bank #0"
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#define MTDPARTS_DEFAULT "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
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*/
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/*-----------------------------------------------------------------------
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* Device drivers
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*/
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#define CONFIG_NET_MULTI /* Multi ethernet cards support */
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#define CONFIG_PCNET
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#define CONFIG_PCNET_79C973
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#define CONFIG_PCNET_79C975
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#define PCNET_HAS_PROM 1
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/************************************************************
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*SATA/Native Stuff
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************************************************************/
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#ifndef GRUSS_TESTING
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#define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */
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#define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
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#define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
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#define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
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#else
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#undef CONFIG_SYS_SATA_MAXBUS
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#undef CONFIG_SYS_SATA_DEVS_PER_BUS
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#undef CONFIG_SYS_SATA_MAX_DEVICE
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#undef CONFIG_ATA_PIIX
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#endif
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/************************************************************
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* DISK Partition support
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************************************************************/
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_ISO_PARTITION /* Experimental */
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/************************************************************
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* Video/Keyboard support
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************************************************************/
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#ifndef GRUSS_TESTING
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#define CONFIG_VIDEO /* To enable video controller support */
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#else
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#undef CONFIG_VIDEO
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#endif
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#define CONFIG_I8042_KBD
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#define CONFIG_SYS_ISA_IO 0
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/************************************************************
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* RTC
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***********************************************************/
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#define CONFIG_RTC_MC146818
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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/*
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* PCI stuff
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*/
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#ifndef GRUSS_TESTING
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI_PNP /* pci plug-and-play */
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_SYS_FIRST_PCI_IRQ 10
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#define CONFIG_SYS_SECOND_PCI_IRQ 9
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#define CONFIG_SYS_THIRD_PCI_IRQ 11
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#define CONFIG_SYS_FORTH_PCI_IRQ 15
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#else
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#undef CONFIG_PCI
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#undef CONFIG_PCI_PNP
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#undef CONFIG_PCI_SCAN_SHOW
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#endif
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#endif /* __CONFIG_H */
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