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https://github.com/brain-hackers/u-boot-brain
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![Simon Glass](/assets/img/avatar_default.png)
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
551 lines
12 KiB
C
551 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <clk.h>
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#include <env.h>
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#include <spi.h>
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#include <mvebu/comphy.h>
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#include <miiphy.h>
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#include <linux/string.h>
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#include <linux/libfdt.h>
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#include <fdt_support.h>
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#include "mox_sp.h"
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#define MAX_MOX_MODULES 10
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#define MOX_MODULE_SFP 0x1
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#define MOX_MODULE_PCI 0x2
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#define MOX_MODULE_TOPAZ 0x3
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#define MOX_MODULE_PERIDOT 0x4
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#define MOX_MODULE_USB3 0x5
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#define MOX_MODULE_PASSPCI 0x6
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#define ARMADA_37XX_NB_GPIO_SEL 0xd0013830
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#define ARMADA_37XX_SPI_CTRL 0xd0010600
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#define ARMADA_37XX_SPI_CFG 0xd0010604
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#define ARMADA_37XX_SPI_DOUT 0xd0010608
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#define ARMADA_37XX_SPI_DIN 0xd001060c
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#define PCIE_PATH "/soc/pcie@d0070000"
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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gd->ram_base = 0;
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gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000);
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = (phys_addr_t)0;
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gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_FIXUP)
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int board_fix_fdt(void *blob)
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{
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u8 topology[MAX_MOX_MODULES];
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int i, size, node;
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bool enable;
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/*
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* SPI driver is not loaded in driver model yet, but we have to find out
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* if pcie should be enabled in U-Boot's device tree. Therefore we have
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* to read SPI by reading/writing SPI registers directly
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*/
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writel(0x563fa, ARMADA_37XX_NB_GPIO_SEL);
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writel(0x10df, ARMADA_37XX_SPI_CFG);
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writel(0x2005b, ARMADA_37XX_SPI_CTRL);
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while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
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udelay(1);
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for (i = 0; i < MAX_MOX_MODULES; ++i) {
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writel(0x0, ARMADA_37XX_SPI_DOUT);
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while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
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udelay(1);
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topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
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if (topology[i] == 0xff)
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break;
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topology[i] &= 0xf;
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}
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size = i;
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writel(0x5b, ARMADA_37XX_SPI_CTRL);
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if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
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topology[1] == MOX_MODULE_USB3 ||
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topology[1] == MOX_MODULE_PASSPCI))
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enable = true;
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else
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enable = false;
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node = fdt_path_offset(blob, PCIE_PATH);
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if (node < 0) {
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printf("Cannot find PCIe node in U-Boot's device tree!\n");
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return 0;
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}
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if (fdt_setprop_string(blob, node, "status",
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enable ? "okay" : "disabled") < 0) {
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printf("Cannot %s PCIe in U-Boot's device tree!\n",
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enable ? "enable" : "disable");
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return 0;
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}
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return 0;
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}
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#endif
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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static int mox_do_spi(u8 *in, u8 *out, size_t size)
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{
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struct spi_slave *slave;
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struct udevice *dev;
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int ret;
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ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
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"spi_generic_drv", "moxtet@1", &dev,
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&slave);
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if (ret)
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goto fail;
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ret = spi_claim_bus(slave);
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if (ret)
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goto fail_free;
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ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
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spi_release_bus(slave);
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fail_free:
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spi_free_slave(slave);
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fail:
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return ret;
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}
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static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
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{
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static int is_sd;
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static u8 topology[MAX_MOX_MODULES - 1];
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static int size;
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u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
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int ret, i;
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if (size) {
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if (ptopology)
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*ptopology = topology;
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if (psize)
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*psize = size;
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if (pis_sd)
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*pis_sd = is_sd;
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return 0;
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}
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memset(din, 0, MAX_MOX_MODULES);
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memset(dout, 0, MAX_MOX_MODULES);
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ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
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if (ret)
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return ret;
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if (din[0] == 0x10)
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is_sd = 1;
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else if (din[0] == 0x00)
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is_sd = 0;
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else
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return -ENODEV;
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for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
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topology[i - 1] = din[i] & 0xf;
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size = i - 1;
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if (ptopology)
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*ptopology = topology;
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if (psize)
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*psize = size;
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if (pis_sd)
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*pis_sd = is_sd;
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return 0;
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}
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int comphy_update_map(struct comphy_map *serdes_map, int count)
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{
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int ret, i, size, sfpindex = -1, swindex = -1;
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const u8 *topology;
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ret = mox_get_topology(&topology, &size, NULL);
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if (ret)
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return ret;
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for (i = 0; i < size; ++i) {
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if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
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sfpindex = i;
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else if ((topology[i] == MOX_MODULE_TOPAZ ||
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topology[i] == MOX_MODULE_PERIDOT) &&
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swindex == -1)
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swindex = i;
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}
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if (sfpindex >= 0 && swindex >= 0) {
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if (sfpindex < swindex)
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serdes_map[0].speed = PHY_SPEED_1_25G;
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else
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serdes_map[0].speed = PHY_SPEED_3_125G;
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} else if (sfpindex >= 0) {
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serdes_map[0].speed = PHY_SPEED_1_25G;
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} else if (swindex >= 0) {
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serdes_map[0].speed = PHY_SPEED_3_125G;
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}
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return 0;
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}
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#define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
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#define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
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static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
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{
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bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
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mdelay(5);
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return bus->read(bus, sw, 0, 1);
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}
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static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
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u16 val)
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{
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bus->write(bus, sw, 0, 1, val);
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bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
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mdelay(5);
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}
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static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
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{
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sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
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return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
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}
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static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
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u16 val)
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{
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sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
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| (val & 0x7ff));
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}
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static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
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{
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int i, p;
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struct {
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int port;
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u16 val;
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int wait;
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} regs[] = {
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{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
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{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
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{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
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{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
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};
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for (i = 0; i < 12; ++i) {
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for (p = 0; p < peridot; ++p) {
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sw_led_write(bus, 0x10 + p, regs[i].port, 0,
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regs[i].val);
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sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
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regs[i].val);
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}
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if (topaz) {
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sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
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regs[i].val);
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}
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if (regs[i].wait)
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mdelay(75);
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}
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}
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static void check_switch_address(struct mii_dev *bus, int addr)
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{
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if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
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printf("Check of switch MDIO address failed for 0x%02x\n",
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addr);
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}
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static int sfp, pci, topaz, peridot, usb, passpci;
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static int sfp_pos, peridot_pos[3];
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static int module_count;
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static int configure_peridots(struct gpio_desc *reset_gpio)
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{
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int i, ret;
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u8 dout[MAX_MOX_MODULES];
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memset(dout, 0, MAX_MOX_MODULES);
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/* set addresses of Peridot modules */
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for (i = 0; i < peridot; ++i)
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dout[module_count - peridot_pos[i]] = (~i) & 3;
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/*
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* if there is a SFP module connected to the last Peridot module, set
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* the P10_SMODE to 1 for the Peridot module
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*/
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if (sfp)
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dout[module_count - peridot_pos[i - 1]] |= 1 << 3;
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dm_gpio_set_value(reset_gpio, 1);
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mdelay(10);
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ret = mox_do_spi(NULL, dout, module_count + 1);
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mdelay(10);
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dm_gpio_set_value(reset_gpio, 0);
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mdelay(50);
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return ret;
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}
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static int get_reset_gpio(struct gpio_desc *reset_gpio)
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{
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int node;
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node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
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if (node < 0) {
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printf("Cannot find Moxtet bus device node!\n");
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return -1;
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}
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gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
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reset_gpio, GPIOD_IS_OUT);
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if (!dm_gpio_is_valid(reset_gpio)) {
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printf("Cannot find reset GPIO for Moxtet bus!\n");
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return -1;
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}
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return 0;
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}
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int misc_init_r(void)
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{
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int ret;
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u8 mac1[6], mac2[6];
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ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
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if (ret < 0) {
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printf("Cannot read data from OTP!\n");
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return 0;
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}
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if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
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eth_env_set_enetaddr("ethaddr", mac1);
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if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
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eth_env_set_enetaddr("eth1addr", mac2);
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return 0;
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}
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static void mox_print_info(void)
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{
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int ret, board_version, ram_size;
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u64 serial_number;
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const char *pub_key;
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ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
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&ram_size);
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if (ret < 0)
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return;
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printf("Turris Mox:\n");
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printf(" Board version: %i\n", board_version);
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printf(" RAM size: %i MiB\n", ram_size);
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printf(" Serial Number: %016llX\n", serial_number);
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pub_key = mox_sp_get_ecdsa_public_key();
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if (pub_key)
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printf(" ECDSA Public Key: %s\n", pub_key);
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else
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printf("Cannot read ECDSA Public Key\n");
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}
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int last_stage_init(void)
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{
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int ret, i;
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const u8 *topology;
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int is_sd;
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struct mii_dev *bus;
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struct gpio_desc reset_gpio = {};
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mox_print_info();
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ret = mox_get_topology(&topology, &module_count, &is_sd);
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if (ret) {
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printf("Cannot read module topology!\n");
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return 0;
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}
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printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
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if (module_count)
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printf("Module Topology:\n");
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for (i = 0; i < module_count; ++i) {
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switch (topology[i]) {
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case MOX_MODULE_SFP:
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printf("% 4i: SFP Module\n", i + 1);
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break;
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case MOX_MODULE_PCI:
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printf("% 4i: Mini-PCIe Module\n", i + 1);
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break;
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case MOX_MODULE_TOPAZ:
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printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
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break;
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case MOX_MODULE_PERIDOT:
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printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
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break;
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case MOX_MODULE_USB3:
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printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
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break;
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case MOX_MODULE_PASSPCI:
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printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
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break;
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default:
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printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
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}
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}
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/* now check if modules are connected in supported mode */
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for (i = 0; i < module_count; ++i) {
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switch (topology[i]) {
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case MOX_MODULE_SFP:
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if (sfp) {
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printf("Error: Only one SFP module is supported!\n");
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} else if (topaz) {
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printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
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} else {
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sfp_pos = i;
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++sfp;
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}
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break;
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case MOX_MODULE_PCI:
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if (pci) {
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printf("Error: Only one Mini-PCIe module is supported!\n");
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} else if (usb) {
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printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
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} else if (i && (i != 1 || !passpci)) {
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printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
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} else {
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++pci;
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}
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break;
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case MOX_MODULE_TOPAZ:
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if (topaz) {
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printf("Error: Only one Topaz module is supported!\n");
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} else if (peridot >= 3) {
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printf("Error: At most two Peridot modules can come before Topaz module!\n");
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} else {
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++topaz;
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}
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break;
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case MOX_MODULE_PERIDOT:
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if (sfp || topaz) {
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printf("Error: Peridot module must come before SFP or Topaz module!\n");
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} else if (peridot >= 3) {
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printf("Error: At most three Peridot modules are supported!\n");
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} else {
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peridot_pos[peridot] = i;
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++peridot;
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}
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break;
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case MOX_MODULE_USB3:
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if (pci) {
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printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
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} else if (usb) {
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printf("Error: Only one USB 3.0 module is supported!\n");
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} else if (i && (i != 1 || !passpci)) {
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printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
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} else {
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++usb;
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}
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break;
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case MOX_MODULE_PASSPCI:
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if (passpci) {
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printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
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} else if (i != 0) {
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printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
|
|
} else {
|
|
++passpci;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* now configure modules */
|
|
|
|
if (get_reset_gpio(&reset_gpio) < 0)
|
|
return 0;
|
|
|
|
if (peridot > 0) {
|
|
if (configure_peridots(&reset_gpio) < 0) {
|
|
printf("Cannot configure Peridot modules!\n");
|
|
peridot = 0;
|
|
}
|
|
} else {
|
|
dm_gpio_set_value(&reset_gpio, 1);
|
|
mdelay(50);
|
|
dm_gpio_set_value(&reset_gpio, 0);
|
|
mdelay(50);
|
|
}
|
|
|
|
if (peridot || topaz) {
|
|
/*
|
|
* now check if the addresses are set by reading Scratch & Misc
|
|
* register 0x70 of Peridot (and potentially Topaz) modules
|
|
*/
|
|
|
|
bus = miiphy_get_dev_by_name("neta@30000");
|
|
if (!bus) {
|
|
printf("Cannot get MDIO bus device!\n");
|
|
} else {
|
|
for (i = 0; i < peridot; ++i)
|
|
check_switch_address(bus, 0x10 + i);
|
|
|
|
if (topaz)
|
|
check_switch_address(bus, 0x2);
|
|
|
|
sw_blink_leds(bus, peridot, topaz);
|
|
}
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
return 0;
|
|
}
|