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https://github.com/brain-hackers/u-boot-brain
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80cce2629b
xilinx_uartlite has been ported to DM, this patch makes the xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new DM driver. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/*
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* (C) Copyright 2008
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* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
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* This work has been supported by: QTechnology http://qtec.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/processor.h>
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ulong __get_PCI_freq(void)
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{
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return 0;
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}
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ulong get_PCI_freq(void) __attribute__((weak, alias("__get_PCI_freq")));
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int __board_pre_init(void)
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{
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return 0;
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}
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int board_pre_init(void) __attribute__((weak, alias("__board_pre_init")));
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int __checkboard(void)
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{
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puts("Xilinx PPC405 Generic Board\n");
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return 0;
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}
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int checkboard(void) __attribute__((weak, alias("__checkboard")));
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phys_size_t __initdram(int board_type)
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{
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return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
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CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024);
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}
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phys_size_t initdram(int) __attribute__((weak, alias("__initdram")));
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void __get_sys_info(sys_info_t *sysInfo)
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{
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sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
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sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
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sysInfo->freqPCI = 0;
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return;
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}
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void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
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int get_serial_clock(void){
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return XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
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}
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