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https://github.com/brain-hackers/u-boot-brain
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3dd22a37aa
This patch makes the necessary changes for making use of I2S0 channel instead of I2S1 channel on smdk board. This changes are done to maintain the uniformity to use I2S0 channel. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
60 lines
1.2 KiB
C
60 lines
1.2 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals required for pinmux configuration. List will
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* grow with support for more devices getting added.
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* Numbering based on interrupt table.
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*
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*/
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enum periph_id {
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PERIPH_ID_UART0 = 51,
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PERIPH_ID_UART1,
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PERIPH_ID_UART2,
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PERIPH_ID_UART3,
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PERIPH_ID_I2C0 = 56,
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PERIPH_ID_I2C1,
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PERIPH_ID_I2C2,
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PERIPH_ID_I2C3,
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PERIPH_ID_I2C4,
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PERIPH_ID_I2C5,
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PERIPH_ID_I2C6,
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PERIPH_ID_I2C7,
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PERIPH_ID_SPI0 = 68,
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PERIPH_ID_SPI1,
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PERIPH_ID_SPI2,
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PERIPH_ID_SDMMC0 = 75,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_I2S0 = 98,
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PERIPH_ID_I2S1 = 99,
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/* Since following peripherals do
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* not have shared peripheral interrupts (SPIs)
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* they are numbered arbitiraly after the maximum
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* SPIs Exynos has (128)
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*/
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PERIPH_ID_SROMC = 128,
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PERIPH_ID_SPI3,
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PERIPH_ID_SPI4,
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PERIPH_ID_SDMMC4,
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PERIPH_ID_PWM0,
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PERIPH_ID_PWM1,
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PERIPH_ID_PWM2,
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PERIPH_ID_PWM3,
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PERIPH_ID_PWM4,
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PERIPH_ID_COUNT,
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PERIPH_ID_NONE = -1,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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