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![Stefan Roese](/assets/img/avatar_default.png)
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
182 lines
4.8 KiB
C
182 lines
4.8 KiB
C
/*
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* Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
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* With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/mpc8xxx_spi.h>
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#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
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#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
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#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
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#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
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#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
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#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
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#define SPI_TIMEOUT 1000
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct spi_slave *slave;
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if (!spi_cs_is_valid(bus, cs))
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return NULL;
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slave = malloc(sizeof(struct spi_slave));
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if (!slave)
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return NULL;
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slave->bus = bus;
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slave->cs = cs;
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/*
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* TODO: Some of the code in spi_init() should probably move
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* here, or into spi_claim_bus() below.
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*/
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return slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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free(slave);
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}
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void spi_init(void)
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{
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volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
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/*
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* SPI pins on the MPC83xx are not muxed, so all we do is initialize
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* some registers
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*/
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spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
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spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
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(16.67MHz typ.) */
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spi->event = 0xffffffff; /* Clear all SPI events */
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spi->mask = 0x00000000; /* Mask all SPI interrupts */
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spi->com = 0; /* LST bit doesn't do anything, so disregard */
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags)
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{
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volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
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unsigned int tmpdout, tmpdin, event;
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int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
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int tm, isRead = 0;
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unsigned char charSize = 32;
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debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
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slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
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if (flags & SPI_XFER_BEGIN)
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spi_cs_activate(slave);
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spi->event = 0xffffffff; /* Clear all SPI events */
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/* handle data in 32-bit chunks */
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while (numBlks--) {
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tmpdout = 0;
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charSize = (bitlen >= 32 ? 32 : bitlen);
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/* Shift data so it's msb-justified */
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tmpdout = *(u32 *) dout >> (32 - charSize);
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/* The LEN field of the SPMODE register is set as follows:
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*
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* Bit length setting
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* len <= 4 3
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* 4 < len <= 16 len - 1
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* len > 16 0
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*/
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if (bitlen <= 16) {
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if (bitlen <= 4)
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spi->mode = (spi->mode & 0xff0fffff) |
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(3 << 20);
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else
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spi->mode = (spi->mode & 0xff0fffff) |
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((bitlen - 1) << 20);
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} else {
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spi->mode = (spi->mode & 0xff0fffff);
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/* Set up the next iteration if sending > 32 bits */
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bitlen -= 32;
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dout += 4;
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}
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spi->tx = tmpdout; /* Write the data out */
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debug("*** spi_xfer: ... %08x written\n", tmpdout);
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/*
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* Wait for SPI transmit to get out
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* or time out (1 second = 1000 ms)
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* The NE event must be read and cleared first
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*/
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for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
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event = spi->event;
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if (event & SPI_EV_NE) {
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tmpdin = spi->rx;
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spi->event |= SPI_EV_NE;
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isRead = 1;
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*(u32 *) din = (tmpdin << (32 - charSize));
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if (charSize == 32) {
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/* Advance output buffer by 32 bits */
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din += 4;
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}
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}
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/*
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* Only bail when we've had both NE and NF events.
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* This will cause timeouts on RO devices, so maybe
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* in the future put an arbitrary delay after writing
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* the device. Arbitrary delays suck, though...
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*/
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if (isRead && (event & SPI_EV_NF))
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break;
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}
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if (tm >= SPI_TIMEOUT)
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puts("*** spi_xfer: Time out during SPI transfer");
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debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
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}
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if (flags & SPI_XFER_END)
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spi_cs_deactivate(slave);
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return 0;
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}
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