Lokesh Vutla 753bae8c5d OMAP5: DPLL core lock for OMAP5432 ... No need to Unlock DPLL initially. DDR3 can work at normal OPP from initialozation Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2012-07-07 14:07:24 +02:00
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clocks.h	OMAP5: DPLL core lock for OMAP5432	2012-07-07 14:07:24 +02:00
cpu.h	OMAP3+: reset: Create a common reset layer.	2012-05-15 08:31:25 +02:00
ehci.h	ehci-omap: Clean up added ehci-omap.c	2012-02-12 10:11:31 +01:00
gpio.h	omap: fix gpio related build breaks	2011-09-04 11:33:36 +02:00
i2c.h	ARMV7: Restructure OMAP i2c driver to allow code sharing between OMAP3 and OMAP4	2010-07-05 20:00:10 -04:00
mmc_host_def.h	ARM:OMAP+:MMC: Add parameters to MMC init	2012-05-15 08:31:22 +02:00
mux_omap4.h	omap4+: Avoid using __attribute__ ((__packed__))	2012-05-15 08:31:26 +02:00
omap.h	OMAP3+: reset: Create a common reset layer.	2012-05-15 08:31:25 +02:00
sys_proto.h	OMAP4/5: Make the silicon revision variable common.	2012-05-15 08:31:24 +02:00