Mugunthan V N 7fb825f5b1 omap5/dra7: i2c: correct register offset for sync register ... The register offset of i2c_sysc offset is not correct as per omap5[1]/dra7[2] TRM, correct the offsets as per the documentation. [1] - http://www.ti.com/lit/pdf/swpu249 [2] - http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>		2016-07-26 08:39:23 +02:00
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asm	omap5/dra7: i2c: correct register offset for sync register	2016-07-26 08:39:23 +02:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00