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https://github.com/brain-hackers/u-boot-brain
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77b55e8cfc
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
63 lines
1.2 KiB
C
63 lines
1.2 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals required for pinmux configuration. List will
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* grow with support for more devices getting added.
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* Numbering based on interrupt table.
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*
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*/
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enum periph_id {
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PERIPH_ID_UART0 = 51,
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PERIPH_ID_UART1,
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PERIPH_ID_UART2,
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PERIPH_ID_UART3,
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PERIPH_ID_I2C0 = 56,
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PERIPH_ID_I2C1,
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PERIPH_ID_I2C2,
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PERIPH_ID_I2C3,
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PERIPH_ID_I2C4,
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PERIPH_ID_I2C5,
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PERIPH_ID_I2C6,
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PERIPH_ID_I2C7,
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PERIPH_ID_SPI0 = 68,
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PERIPH_ID_SPI1,
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PERIPH_ID_SPI2,
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PERIPH_ID_SDMMC0 = 75,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_I2C8 = 87,
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PERIPH_ID_I2C9,
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PERIPH_ID_I2S0 = 98,
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PERIPH_ID_I2S1 = 99,
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/* Since following peripherals do
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* not have shared peripheral interrupts (SPIs)
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* they are numbered arbitiraly after the maximum
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* SPIs Exynos has (128)
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*/
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PERIPH_ID_SROMC = 128,
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PERIPH_ID_SPI3,
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PERIPH_ID_SPI4,
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PERIPH_ID_SDMMC4,
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PERIPH_ID_PWM0,
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PERIPH_ID_PWM1,
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PERIPH_ID_PWM2,
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PERIPH_ID_PWM3,
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PERIPH_ID_PWM4,
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PERIPH_ID_DPHPD,
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PERIPH_ID_I2C10 = 203,
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PERIPH_ID_NONE = -1,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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