mirror of
https://github.com/brain-hackers/u-boot-brain
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77b55e8cfc
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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* R. Chandrasekar <rcsekar@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __I2S_REGS_H__
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#define __I2S_REGS_H__
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#define CON_RESET (1 << 31)
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#define CON_TXFIFO_FULL (1 << 8)
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#define CON_TXCH_PAUSE (1 << 4)
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#define CON_ACTIVE (1 << 0)
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#define MOD_OP_CLK (3 << 30)
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#define MOD_BLCP_SHIFT 24
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#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
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#define MOD_BLC_16BIT (0 << 13)
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#define MOD_BLC_8BIT (1 << 13)
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#define MOD_BLC_24BIT (2 << 13)
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#define MOD_BLC_MASK (3 << 13)
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#define MOD_SLAVE (1 << 11)
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#define MOD_RCLKSRC (0 << 10)
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#define MOD_MASK (3 << 8)
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#define MOD_LR_LLOW (0 << 7)
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#define MOD_LR_RLOW (1 << 7)
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#define MOD_SDF_IIS (0 << 5)
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#define MOD_SDF_MSB (1 << 5)
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#define MOD_SDF_LSB (2 << 5)
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#define MOD_SDF_MASK (3 << 5)
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#define MOD_RCLK_256FS (0 << 3)
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#define MOD_RCLK_512FS (1 << 3)
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#define MOD_RCLK_384FS (2 << 3)
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#define MOD_RCLK_768FS (3 << 3)
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#define MOD_RCLK_MASK (3 << 3)
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#define MOD_BCLK_32FS (0 << 1)
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#define MOD_BCLK_48FS (1 << 1)
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#define MOD_BCLK_16FS (2 << 1)
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#define MOD_BCLK_24FS (3 << 1)
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#define MOD_BCLK_MASK (3 << 1)
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#define MOD_CDCLKCON (1 << 12)
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#define FIC_TXFLUSH (1 << 15)
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#define FIC_RXFLUSH (1 << 7)
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#define PSREN (1 << 15)
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#define PSVAL (3 << 8)
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#endif /* __I2S_REGS_H__ */
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