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![Simon Glass](/assets/img/avatar_default.png)
At present one of the regmap tests takes 5 seconds to run since it waits
for a timeout. This should be handled using sandbox_timer_add_offset()
which advances time for test purposes.
This requires a little change to make the regmap_read_poll_timeout()
testable.
Update the macro and the test.
Fixes: ebe3497c9c
("test: regmap: add regmap_read_poll_timeout test")
Signed-off-by: Simon Glass <sjg@chromium.org>
174 lines
4.4 KiB
C
174 lines
4.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <mapmem.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/test.h>
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#include <dm/test.h>
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#include <test/ut.h>
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/* Base test of register maps */
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static int dm_test_regmap_base(struct unit_test_state *uts)
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{
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struct udevice *dev;
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struct regmap *map;
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ofnode node;
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int i;
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ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
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map = syscon_get_regmap(dev);
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ut_assertok_ptr(map);
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ut_asserteq(1, map->range_count);
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ut_asserteq(0x10, map->ranges[0].start);
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ut_asserteq(16, map->ranges[0].size);
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ut_asserteq(0x10, map_to_sysmem(regmap_get_range(map, 0)));
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ut_assertok(uclass_get_device(UCLASS_SYSCON, 1, &dev));
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map = syscon_get_regmap(dev);
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ut_assertok_ptr(map);
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ut_asserteq(4, map->range_count);
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ut_asserteq(0x20, map->ranges[0].start);
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for (i = 0; i < 4; i++) {
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const unsigned long addr = 0x20 + 8 * i;
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ut_asserteq(addr, map->ranges[i].start);
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ut_asserteq(5 + i, map->ranges[i].size);
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ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
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}
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/* Check that we can't pretend a different device is a syscon */
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ut_assertok(uclass_get_device(UCLASS_I2C, 0, &dev));
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map = syscon_get_regmap(dev);
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ut_asserteq_ptr(ERR_PTR(-ENOEXEC), map);
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/* A different device can be a syscon by using Linux-compat API */
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node = ofnode_path("/syscon@2");
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ut_assert(ofnode_valid(node));
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map = syscon_node_to_regmap(node);
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ut_assertok_ptr(map);
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ut_asserteq(4, map->range_count);
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ut_asserteq(0x40, map->ranges[0].start);
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for (i = 0; i < 4; i++) {
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const unsigned long addr = 0x40 + 8 * i;
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ut_asserteq(addr, map->ranges[i].start);
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ut_asserteq(5 + i, map->ranges[i].size);
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ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
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}
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return 0;
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}
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DM_TEST(dm_test_regmap_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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/* Test we can access a regmap through syscon */
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static int dm_test_regmap_syscon(struct unit_test_state *uts)
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{
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struct regmap *map;
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map = syscon_get_regmap_by_driver_data(SYSCON0);
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ut_assertok_ptr(map);
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ut_asserteq(1, map->range_count);
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map = syscon_get_regmap_by_driver_data(SYSCON1);
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ut_assertok_ptr(map);
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ut_asserteq(4, map->range_count);
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map = syscon_get_regmap_by_driver_data(SYSCON_COUNT);
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ut_asserteq_ptr(ERR_PTR(-ENODEV), map);
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ut_asserteq(0x10, map_to_sysmem(syscon_get_first_range(SYSCON0)));
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ut_asserteq(0x20, map_to_sysmem(syscon_get_first_range(SYSCON1)));
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ut_asserteq_ptr(ERR_PTR(-ENODEV),
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syscon_get_first_range(SYSCON_COUNT));
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return 0;
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}
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DM_TEST(dm_test_regmap_syscon, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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/* Read/Write/Modify test */
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static int dm_test_regmap_rw(struct unit_test_state *uts)
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{
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struct udevice *dev;
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struct regmap *map;
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uint reg;
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ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
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map = syscon_get_regmap(dev);
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ut_assertok_ptr(map);
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ut_assertok(regmap_write(map, 0, 0xcacafafa));
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ut_assertok(regmap_write(map, 3, 0x55aa2211));
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ut_assertok(regmap_read(map, 0, ®));
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ut_assertok(regmap_read(map, 3, ®));
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ut_assertok(regmap_update_bits(map, 0, 0xff00ff00, 0x55aa2211));
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ut_assertok(regmap_update_bits(map, 3, 0x00ff00ff, 0xcacafada));
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return 0;
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}
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DM_TEST(dm_test_regmap_rw, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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/* Get/Set test */
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static int dm_test_regmap_getset(struct unit_test_state *uts)
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{
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struct udevice *dev;
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struct regmap *map;
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uint reg;
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struct layout {
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u32 val0;
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u32 val1;
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u32 val2;
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u32 val3;
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};
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ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
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map = syscon_get_regmap(dev);
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ut_assertok_ptr(map);
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regmap_set(map, struct layout, val0, 0xcacafafa);
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regmap_set(map, struct layout, val3, 0x55aa2211);
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ut_assertok(regmap_get(map, struct layout, val0, ®));
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ut_assertok(regmap_get(map, struct layout, val3, ®));
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return 0;
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}
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DM_TEST(dm_test_regmap_getset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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/* Read polling test */
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static int dm_test_regmap_poll(struct unit_test_state *uts)
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{
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struct udevice *dev;
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struct regmap *map;
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uint reg;
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unsigned long start;
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ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
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map = syscon_get_regmap(dev);
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ut_assertok_ptr(map);
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start = get_timer(0);
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ut_asserteq(-ETIMEDOUT,
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regmap_read_poll_timeout_test(map, 0, reg,
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(reg == 0xcacafafa),
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1, 5 * CONFIG_SYS_HZ,
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5 * CONFIG_SYS_HZ));
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ut_assert(get_timer(start) > (5 * CONFIG_SYS_HZ));
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return 0;
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}
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DM_TEST(dm_test_regmap_poll, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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