mirror of
https://github.com/brain-hackers/u-boot-brain
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7f36c88f64
Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
58 lines
2.4 KiB
C
58 lines
2.4 KiB
C
/*
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* (C) Copyright 2013
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* Sricharan R <r.sricharan@ti.com>
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* Nishant Kamat <nskamat@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _MUX_DATA_DRA7XX_H_
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#define _MUX_DATA_DRA7XX_H_
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#include <asm/arch/mux_dra7xx.h>
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const struct pad_conf_entry core_padconf_array_essential[] = {
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{MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */
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{MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */
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{MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */
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{MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */
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{MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */
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{MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */
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{MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */
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{MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */
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{GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */
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{GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */
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{GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */
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{GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */
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{GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */
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{GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */
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{GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */
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{GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */
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{GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */
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{GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */
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{UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */
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{UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */
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{UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */
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{UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */
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{I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
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{I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
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};
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#endif /* _MUX_DATA_DRA7XX_H_ */
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