mirror of
https://github.com/brain-hackers/u-boot-brain
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a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2013-2016, NVIDIA CORPORATION.
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*/
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#ifndef _P2771_0000_H
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#define _P2771_0000_H
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#include <linux/sizes.h>
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#include "tegra186-common.h"
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/* High-level configuration options */
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#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000"
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 2
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#define BOARD_EXTRA_ENV_SETTINGS \
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"calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \
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"ramdisk_addr_r\0" \
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"kernel_addr_r_align=00200000\0" \
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"kernel_addr_r_offset=00080000\0" \
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"kernel_addr_r_size=02000000\0" \
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"kernel_addr_r_aliases=loadaddr\0" \
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"fdt_addr_r_align=00200000\0" \
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"fdt_addr_r_offset=00000000\0" \
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"fdt_addr_r_size=00200000\0" \
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"scriptaddr_align=00200000\0" \
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"scriptaddr_offset=00000000\0" \
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"scriptaddr_size=00200000\0" \
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"pxefile_addr_r_align=00200000\0" \
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"pxefile_addr_r_offset=00000000\0" \
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"pxefile_addr_r_size=00200000\0" \
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"ramdisk_addr_r_align=00200000\0" \
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"ramdisk_addr_r_offset=00000000\0" \
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"ramdisk_addr_r_size=02000000\0"
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#include "tegra-common-post.h"
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/* Crystal is 38.4MHz. clk_m runs at half that rate */
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#define COUNTER_FREQUENCY 19200000
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#endif
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