Grzegorz Bernacki 7f19139389 [PPC440SPe] Improve PCIe configuration space access ... - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>		2007-09-07 18:20:23 +02:00
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cmd_yucca.c	Add support for TB5200 board	2006-07-19 13:50:38 +02:00
config.mk	Add support for AMCC 440SPe CPU based eval board (Yucca).	2006-06-30 16:30:46 +02:00
flash.c	Add support for TB5200 board	2006-07-19 13:50:38 +02:00
init.S	[PPC440SPe] Improve PCIe configuration space access	2007-09-07 18:20:23 +02:00
Makefile	Move "ar" flags to config.mk to allow for silent "make -s"	2006-10-09 01:02:05 +02:00
u-boot.lds	Add support for AMCC 440SPe CPU based eval board (Yucca).	2006-06-30 16:30:46 +02:00
u-boot.lds.debug	Add support for AMCC 440SPe CPU based eval board (Yucca).	2006-06-30 16:30:46 +02:00
yucca.c	[PPC440SPe] Improve PCIe configuration space access	2007-09-07 18:20:23 +02:00
yucca.h	Improve DIMM detection for AMCC Yucca 440SPe board	2006-08-29 08:04:32 +02:00