Scott Wood 7f0a22ff25 powerpc/mpc85xx: fix TLB alignment ... In the RAMBOOT/SPL case we were creating a TLB entry starting at CONFIG_SYS_MONITOR_BASE, and just hoping that the base was properly aligned for the TLB entry size. This turned out to not be the case with NAND SPL because the main U-Boot starts at an offset into the image in order to skip the SPL itself. Fix the TLB entry to always start at a proper alignment. We still assume that CONFIG_SYS_MONITOR_BASE doesn't start immediately before a large-page boundary thus requiring multiple TLB entries. Signed-off-by: Scott Wood <scottwood@frescale.com> Cc: Andy Fleming <afleming@freescale.com>		2012-11-26 15:41:22 -06:00
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74xx_7xx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc5xx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc5xxx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc8xx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc8xxx	arch/powerpc/cpu/mpc8xxx/: sparse fixes	2012-11-04 11:00:36 -07:00
mpc83xx	powerpc/mpc83xx: sparse fixes	2012-11-04 11:00:37 -07:00
mpc85xx	powerpc/mpc85xx: fix TLB alignment	2012-11-26 15:41:22 -06:00
mpc86xx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc512x	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc824x	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc8220	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
mpc8260	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00
ppc4xx	arch/powerpc/lib/board.c, *traps.c: sparse fixes	2012-11-04 11:00:35 -07:00