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u-boot-brain/arch/arm/include/asm/arch-mx6
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Fabio Estevam edf0093732 mx6: ddr: Allow changing REFSEL and REFR fields 
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
2016-09-06 18:22:48 +02:00
..
clock.h imx: mx6: Fix procedure to switch the parent of LDB_DI_CLK 2016-04-19 16:05:12 +02:00
crm_regs.h imx: mx6ul/sx: fix mmdc_ch0 clk calculation 2016-01-24 12:13:21 +01:00
gpio.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
imx-rdc.h imx: mx6sx Add RDC mappings of masters and peripherals 2016-02-21 11:46:26 +01:00
imx-regs.h ARM: Move SYS_CACHELINE_SIZE over to Kconfig 2016-08-26 17:04:46 -04:00
iomux.h pci: pcie_imx: Fix hang on mx6qp 2015-10-15 09:05:13 -04:00
mx6-ddr.h mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06 18:22:48 +02:00
mx6-pins.h imx: mx6ul: Add pins IOMUX head file 2015-08-02 11:05:06 +02:00
mx6dl_pins.h i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10 2014-07-10 15:23:56 +02:00
mx6dl-ddr.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mx6q_pins.h imx6 SION bit has to be on for the pins that are used as ENET_REF_CLK 2014-02-19 10:57:25 +01:00
mx6q-ddr.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mx6sl_pins.h imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5 2016-05-17 17:52:19 +02:00
mx6sl-ddr.h imx: mx6: ddr add dram io configuration and header file for i.MX6SL 2015-09-02 15:34:12 +02:00
mx6sx_pins.h imx: mx6sx enable SION for i2c pin mux 2015-05-19 15:13:24 +02:00
mx6sx_rdc.h imx: mx6sx Add RDC mappings of masters and peripherals 2016-02-21 11:46:26 +01:00
mx6sx-ddr.h mx6: Add support for the mx6solox variant 2014-07-10 15:29:16 +02:00
mx6ul_pins.h imx: mx6ul: Add pins IOMUX head file 2015-08-02 11:05:06 +02:00
mx6ul-ddr.h imx:mx6ul add dram spl configuration and header file 2015-08-02 11:05:09 +02:00
mxc_hdmi.h Merge git://git.denx.de/u-boot-arm 2013-07-31 11:30:38 +02:00
sys_proto.h imx-common: consolidate macros and prototypes into sys_proto.h 2015-09-02 15:29:14 +02:00