mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-27 23:20:26 +09:00
7e1afb62a7
The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> |
||
---|---|---|
.. | ||
arm | ||
avr32 | ||
blackfin | ||
i386 | ||
m68k | ||
microblaze | ||
mips | ||
nios | ||
nios2 | ||
powerpc | ||
sh | ||
sparc |