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https://github.com/brain-hackers/u-boot-brain
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93f26f130e
fsl_enet.h defines the mapping of the usual MII management registers, which are included in the MDIO register block common to Freescale ethernet controllers. So it shouldn't depend on the CPU architecture but it should be actually part of the arch independent fsl_mdio.h. To remove the arch dependency, merge the content of asm/fsl_enet.h into fsl_mdio.h. Some files (like fm_eth.h) were simply including fsl_enet.h only for phy.h. These were updated to include phy.h instead. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
346 lines
8.2 KiB
C
346 lines
8.2 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/fsl_serdes.h>
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#include <fsl_mdio.h>
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#include "fm.h"
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struct fm_eth_info fm_info[] = {
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
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FM_DTSEC_INFO_INITIALIZER(1, 1),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
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FM_DTSEC_INFO_INITIALIZER(1, 2),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
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FM_DTSEC_INFO_INITIALIZER(1, 3),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
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FM_DTSEC_INFO_INITIALIZER(1, 4),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
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FM_DTSEC_INFO_INITIALIZER(1, 5),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
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FM_DTSEC_INFO_INITIALIZER(1, 6),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
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FM_DTSEC_INFO_INITIALIZER(1, 9),
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#endif
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#if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
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FM_DTSEC_INFO_INITIALIZER(1, 10),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
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FM_DTSEC_INFO_INITIALIZER(2, 1),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
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FM_DTSEC_INFO_INITIALIZER(2, 2),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
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FM_DTSEC_INFO_INITIALIZER(2, 3),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
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FM_DTSEC_INFO_INITIALIZER(2, 4),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
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FM_DTSEC_INFO_INITIALIZER(2, 5),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
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FM_DTSEC_INFO_INITIALIZER(2, 6),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
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FM_DTSEC_INFO_INITIALIZER(2, 9),
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#endif
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#if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
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FM_DTSEC_INFO_INITIALIZER(2, 10),
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#endif
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#if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
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FM_TGEC_INFO_INITIALIZER(1, 1),
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#endif
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#if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
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FM_TGEC_INFO_INITIALIZER(1, 2),
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#endif
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#if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
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FM_TGEC_INFO_INITIALIZER2(1, 3),
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#endif
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#if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
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FM_TGEC_INFO_INITIALIZER2(1, 4),
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#endif
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#if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
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FM_TGEC_INFO_INITIALIZER(2, 1),
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#endif
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#if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
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FM_TGEC_INFO_INITIALIZER(2, 2),
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#endif
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};
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int fm_standard_init(bd_t *bis)
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{
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int i;
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struct ccsr_fman *reg;
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reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
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if (fm_init_common(0, reg))
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return 0;
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for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
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if ((fm_info[i].enabled) && (fm_info[i].index == 1))
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fm_eth_initialize(reg, &fm_info[i]);
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}
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#if (CONFIG_SYS_NUM_FMAN == 2)
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reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
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if (fm_init_common(1, reg))
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return 0;
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for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
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if ((fm_info[i].enabled) && (fm_info[i].index == 2))
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fm_eth_initialize(reg, &fm_info[i]);
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}
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#endif
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return 1;
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}
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/* simple linear search to map from port to array index */
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static int fm_port_to_index(enum fm_port port)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
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if (fm_info[i].port == port)
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return i;
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}
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return -1;
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}
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/*
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* Determine if an interface is actually active based on HW config
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* we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
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* the interface is not active based on HW cfg of the SoC
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*/
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void fman_enet_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
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phy_interface_t enet_if;
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enet_if = fman_port_enet_if(fm_info[i].port);
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if (enet_if != PHY_INTERFACE_MODE_NONE) {
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fm_info[i].enabled = 1;
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fm_info[i].enet_if = enet_if;
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} else {
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fm_info[i].enabled = 0;
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}
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}
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return ;
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}
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void fm_disable_port(enum fm_port port)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return;
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fm_info[i].enabled = 0;
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fman_disable_port(port);
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}
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void fm_enable_port(enum fm_port port)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return;
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fm_info[i].enabled = 1;
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fman_enable_port(port);
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}
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void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return;
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fm_info[i].bus = bus;
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}
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void fm_info_set_phy_address(enum fm_port port, int address)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return;
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fm_info[i].phy_addr = address;
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}
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/*
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* Returns the PHY address for a given Fman port
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*
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* The port must be set via a prior call to fm_info_set_phy_address().
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* A negative error code is returned if the port is invalid.
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*/
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int fm_info_get_phy_address(enum fm_port port)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return -1;
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return fm_info[i].phy_addr;
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}
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/*
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* Returns the type of the data interface between the given MAC and its PHY.
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* This is typically determined by the RCW.
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*/
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phy_interface_t fm_info_get_enet_if(enum fm_port port)
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{
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int i = fm_port_to_index(port);
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if (i == -1)
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return PHY_INTERFACE_MODE_NONE;
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if (fm_info[i].enabled)
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return fm_info[i].enet_if;
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return PHY_INTERFACE_MODE_NONE;
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}
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static void
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__def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
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enum fm_port port, int offset)
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{
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return ;
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}
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void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
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enum fm_port port, int offset)
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__attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
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static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
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{
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int off;
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uint32_t ph;
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phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
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u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
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CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
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off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
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if (info->enabled) {
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fdt_fixup_phy_connection(blob, off, info->enet_if);
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board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
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return ;
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}
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#ifdef CONFIG_SYS_FMAN_V3
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/*
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* Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when
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* FM1_10GEC1 is enabled and FM1_DTSEC9 is disabled, ensure that the
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* dual-role MAC is not disabled, ditto for other dual-role MACs.
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*/
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if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
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((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
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((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
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((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
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((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) ||
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((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) ||
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((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
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((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2)))
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#if (CONFIG_SYS_NUM_FMAN == 2)
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||
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((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) ||
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((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) ||
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((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) ||
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((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
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#endif
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)
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return;
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#endif
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/* board code might have caused offset to change */
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off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
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/* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
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if (paddr != dtsec1_addr)
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fdt_status_disabled(blob, off); /* disable the MAC node */
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/* disable the fsl,dpa-ethernet node that points to the MAC */
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ph = fdt_get_phandle(blob, off);
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do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
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"status", "disabled", strlen("disabled") + 1, 1);
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}
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void fdt_fixup_fman_ethernet(void *blob)
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{
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int i;
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#ifdef CONFIG_SYS_FMAN_V3
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for (i = 0; i < ARRAY_SIZE(fm_info); i++)
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ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
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#else
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for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
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if (fm_info[i].type == FM_ETH_1G_E)
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ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
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else
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ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
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}
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#endif
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}
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/*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
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*This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
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*then set the correct PHY address
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*/
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void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
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unsigned int port_num, int phy_base_addr)
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{
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unsigned int regnum = 0;
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int qsgmii;
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int i;
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int phy_real_addr;
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qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
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if (!qsgmii)
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return;
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for (i = base_port; i < base_port + port_num; i++) {
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if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
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phy_real_addr = phy_base_addr + i - base_port;
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fm_info_set_phy_address(i, phy_real_addr);
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}
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}
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}
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/*to check whether qsgmii riser card is used*/
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int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
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unsigned int port_num, unsigned regnum)
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{
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int i;
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int val;
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if (!bus)
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return 0;
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for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
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val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
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if (val != MIIM_TIMEOUT)
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return 1;
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}
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return 0;
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}
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