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u-boot-brain/arch/arm/mach-stm32mp
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Patrick Delaunay 77c077e171 arm: stm32mp: correct the ALIGN macro usage 
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour
call: the address must use ALIGN_DOWN and size can use ALIGN macro.

With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for
STM32MP15x the computed address was 30000000 instead of 2ff00000.

Fixes: 43fe9d2fda ("stm32mp1: mmu_set_region_dcache_behaviour")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:33:16 +01:00
..
cmd_stm32prog stm32mp: stm32prog: accept device without partition 2020-10-21 18:12:20 +02:00
include/mach arm: stm32: cleanup arch gpio.h 2020-10-21 18:12:20 +02:00
boot_params.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
bsec.c arm: stm32mp: bsec: use IS_ENABLED to prevent ifdef 2020-08-13 09:52:49 +02:00
cmd_stm32key.c command: Remove the cmd_tbl_t typedef 2020-05-18 18:36:55 -04:00
config.mk Makefile: Rename ALL-y to INPUTS-y 2020-07-28 19:30:39 -06:00
cpu.c arm: stm32mp: correct the ALIGN macro usage 2020-11-25 10:33:16 +01:00
dram_init.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
fdt.c treewide: convert bd_t to struct bd_info by coccinelle 2020-07-17 09:30:13 -04:00
Kconfig stm32mp: limit size of cacheable DDR in pre-reloc stage 2020-10-21 18:12:20 +02:00
Makefile arm: stm32mp: spl: add bsec driver in SPL 2020-07-07 16:01:23 +02:00
psci.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
pwr_regulator.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
spl.c stm32mp: limit size of cacheable DDR in pre-reloc stage 2020-10-21 18:12:20 +02:00
syscon.c stm32mp1: pwr: use the last binding for pwr 2020-02-13 17:26:22 +01:00