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https://github.com/brain-hackers/u-boot-brain
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![Stefano Babic](/assets/img/avatar_default.png)
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
127 lines
2.4 KiB
C
127 lines
2.4 KiB
C
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* The file use ls102xa/timer.c as a reference.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <div64.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/syscounter.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* This function is intended for SHORT delays only.
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* It will overflow at around 10 seconds @ 400MHz,
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* or 20 seconds @ 200MHz.
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*/
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unsigned long usec2ticks(unsigned long usec)
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{
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ulong ticks;
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if (usec < 1000)
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ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
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else
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ticks = ((usec / 10) * (get_tbclk() / 100000));
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return ticks;
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}
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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tick *= CONFIG_SYS_HZ;
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do_div(tick, freq);
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return tick;
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}
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static inline unsigned long long us_to_tick(unsigned long long usec)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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usec = usec * freq + 999999;
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do_div(usec, 1000000);
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return usec;
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}
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int timer_init(void)
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{
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struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
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unsigned long val, freq;
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freq = CONFIG_SC_TIMER_CLK;
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asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
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writel(freq, &sctr->cntfid0);
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/* Enable system counter */
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val = readl(&sctr->cntcr);
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val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
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val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
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writel(val, &sctr->cntcr);
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gd->arch.tbl = 0;
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gd->arch.tbu = 0;
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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unsigned long long now;
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asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
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gd->arch.tbl = (unsigned long)(now & 0xffffffff);
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gd->arch.tbu = (unsigned long)(now >> 32);
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return now;
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}
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ulong get_timer_masked(void)
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{
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return tick_to_time(get_ticks());
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}
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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void __udelay(unsigned long usec)
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{
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unsigned long long tmp;
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ulong tmo;
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tmo = us_to_tick(usec);
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tmp = get_ticks() + tmo; /* get current timestamp */
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while (get_ticks() < tmp) /* loop till event */
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/*NOP*/;
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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return freq;
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}
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