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https://github.com/brain-hackers/u-boot-brain
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![Heiko Schocher](/assets/img/avatar_default.png)
replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
241 lines
5.6 KiB
C
241 lines
5.6 KiB
C
/*
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* Board functions for Siemens TAURUS (AT91SAM9G20) based boards
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* (C) Copyright Siemens AG
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*
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* Based on:
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* U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
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*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91sam9260_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/at91sam9_sdramc.h>
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#include <asm/arch/clk.h>
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#include <linux/mtd/nand.h>
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#include <atmel_mci.h>
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#include <asm/arch/at91_spi.h>
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#include <spi.h>
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#include <net.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void taurus_nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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unsigned long csa;
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/* Assign CS3 to NAND/SmartMedia Interface */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(3),
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&smc->cs[3].mode);
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#if defined(CONFIG_SPL_BUILD)
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#include <spl.h>
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#include <nand.h>
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void matrix_init(void)
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{
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struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
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| AT91_MATRIX_SLOT_CYCLE_(0x40),
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&mat->scfg[3]);
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}
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void at91_spl_board_init(void)
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{
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taurus_nand_hw_init();
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/* Configure recovery button PINs */
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at91_set_gpio_input(AT91_PIN_PA31, 1);
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/* check if button is pressed */
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if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
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u32 boot_device;
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debug("Recovery button pressed\n");
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boot_device = spl_boot_device();
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switch (boot_device) {
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#ifdef CONFIG_SPL_NAND_SUPPORT
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case BOOT_DEVICE_NAND:
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nand_init();
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spl_nand_erase_one(0, 0);
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break;
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#endif
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}
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}
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}
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void mem_init(void)
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{
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struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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struct sdramc_reg setting;
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at91_sdram_hw_init();
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setting.cr = (AT91_SDRAMC_NC_9 |
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AT91_SDRAMC_NR_13 |
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AT91_SDRAMC_CAS_3 |
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AT91_SDRAMC_NB_4 |
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AT91_SDRAMC_DBW_32 |
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AT91_SDRAMC_TWR_VAL(3) |
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AT91_SDRAMC_TRC_VAL(9) |
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AT91_SDRAMC_TRP_VAL(3) |
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AT91_SDRAMC_TRCD_VAL(3) |
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AT91_SDRAMC_TRAS_VAL(6) |
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AT91_SDRAMC_TXSR_VAL(10));
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setting.mdr = AT91_SDRAMC_MD_SDRAM;
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setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
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writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
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AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
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&ma->ebicsa);
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sdramc_initialize(ATMEL_BASE_CS1, &setting);
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}
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#endif
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#ifdef CONFIG_MACB
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static void taurus_macb_hw_init(void)
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{
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/* Enable EMAC clock */
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at91_periph_clk_enable(ATMEL_ID_EMAC0);
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/*
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* Disable pull-up on:
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* RXDV (PA17) => PHY normal mode (not Test mode)
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* ERX0 (PA14) => PHY ADDR0
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* ERX1 (PA15) => PHY ADDR1
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* ERX2 (PA25) => PHY ADDR2
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* ERX3 (PA26) => PHY ADDR3
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
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at91_phy_reset();
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at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
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/* Re-enable pull-up */
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at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
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/* Initialize EMAC=MACB hardware */
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at91_macb_hw_init();
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}
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#endif
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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int board_mmc_init(bd_t *bd)
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{
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at91_mci_hw_init();
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return atmel_mci_init((void *)ATMEL_BASE_MCI);
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}
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#endif
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int board_early_init_f(void)
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{
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/* Enable clocks for all PIOs */
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_periph_clk_enable(ATMEL_ID_PIOB);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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at91_seriald_hw_init();
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return 0;
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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return bus == 0 && cs == 0;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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at91_set_gpio_value(TAURUS_SPI_CS_PIN, 0);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_CMD_NAND
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taurus_nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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taurus_macb_hw_init();
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#endif
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at91_spi0_hw_init(TAURUS_SPI_MASK);
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
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#endif
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return rc;
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}
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