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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
148 lines
3.2 KiB
C
148 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SH7750/SH7750S/SH7750R/SH7751/SH7751R
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* Internal I/O register
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*/
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#ifndef _ASM_CPU_SH7750_H_
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#define _ASM_CPU_SH7750_H_
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#ifdef CONFIG_CPU_TYPE_R
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#define CACHE_OC_NUM_WAYS 2
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#define CCR_CACHE_INIT 0x8000090D /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */
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#else
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#define CACHE_OC_NUM_WAYS 1
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#define CCR_CACHE_INIT 0x0000090B
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#endif
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/* OCN */
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#define PTEH 0xFF000000
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#define PTEL 0xFF000004
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#define TTB 0xFF000008
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#define TEA 0xFF00000C
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#define MMUCR 0xFF000010
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#define BASRA 0xFF000014
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#define BASRB 0xFF000018
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#define CCR 0xFF00001C
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#define TRA 0xFF000020
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#define EXPEVT 0xFF000024
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#define INTEVT 0xFF000028
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#define PTEA 0xFF000034
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#define QACR0 0xFF000038
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#define QACR1 0xFF00003C
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/* UBC */
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#define BARA 0xFF200000
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#define BAMRA 0xFF200004
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#define BBRA 0xFF200008
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#define BARB 0xFF20000C
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#define BAMRB 0xFF200010
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#define BBRB 0xFF200014
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#define BDRB 0xFF200018
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#define BDMRB 0xFF20001C
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#define BRCR 0xFF200020
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/* BSC */
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#define BCR1 0xFF800000
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#define BCR2 0xFF800004
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#define BCR3 0xFF800050
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#define BCR4 0xFE0A00F0
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#define WCR1 0xFF800008
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#define WCR2 0xFF80000C
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#define WCR3 0xFF800010
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#define MCR 0xFF800014
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#define PCR 0xFF800018
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#define RTCSR 0xFF80001C
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#define RTCNT 0xFF800020
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#define RTCOR 0xFF800024
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#define RFCR 0xFF800028
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#define PCTRA 0xFF80002C
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#define PDTRA 0xFF800030
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#define PCTRB 0xFF800040
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#define PDTRB 0xFF800044
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#define GPIOIC 0xFF800048
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/* DMAC */
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#define SAR0 0xFFA00000
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#define DAR0 0xFFA00004
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#define DMATCR0 0xFFA00008
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#define CHCR0 0xFFA0000C
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#define SAR1 0xFFA00010
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#define DAR1 0xFFA00014
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#define DMATCR1 0xFFA00018
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#define CHCR1 0xFFA0001C
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#define SAR2 0xFFA00020
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#define DAR2 0xFFA00024
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#define DMATCR2 0xFFA00028
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#define CHCR2 0xFFA0002C
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#define SAR3 0xFFA00030
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#define DAR3 0xFFA00034
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#define DMATCR3 0xFFA00038
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#define CHCR3 0xFFA0003C
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#define DMAOR 0xFFA00040
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#define SAR4 0xFFA00050
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#define DAR4 0xFFA00054
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#define DMATCR4 0xFFA00058
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/* CPG */
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#define FRQCR 0xFFC00000
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#define STBCR 0xFFC00004
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#define WTCNT 0xFFC00008
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#define WTCSR 0xFFC0000C
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#define STBCR2 0xFFC00010
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/* RTC */
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#define R64CNT 0xFFC80000
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#define RSECCNT 0xFFC80004
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#define RMINCNT 0xFFC80008
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#define RHRCNT 0xFFC8000C
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#define RWKCNT 0xFFC80010
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#define RDAYCNT 0xFFC80014
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#define RMONCNT 0xFFC80018
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#define RYRCNT 0xFFC8001C
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#define RSECAR 0xFFC80020
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#define RMINAR 0xFFC80024
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#define RHRAR 0xFFC80028
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#define RWKAR 0xFFC8002C
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#define RDAYAR 0xFFC80030
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#define RMONAR 0xFFC80034
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#define RCR1 0xFFC80038
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#define RCR2 0xFFC8003C
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#define RCR3 0xFFC80050
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#define RYRAR 0xFFC80054
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/* ICR */
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#define ICR 0xFFD00000
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#define IPRA 0xFFD00004
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#define IPRB 0xFFD00008
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#define IPRC 0xFFD0000C
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#define IPRD 0xFFD00010
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#define INTPRI 0xFE080000
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#define INTREQ 0xFE080020
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#define INTMSK 0xFE080040
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#define INTMSKCL 0xFE080060
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/* CPG */
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#define CLKSTP 0xFE0A0000
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#define CLKSTPCLR 0xFE0A0008
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/* TMU */
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#define TMU_BASE 0xFFD80000
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/* SCI */
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#define SCSMR1 0xFFE00000
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#define SCF0_BASE SCSMR1
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/* SCIF */
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#define SCSMR2 0xFFE80000
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#define SCIF1_BASE SCSMR2
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/* H-UDI */
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#define SDIR 0xFFF00000
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#define SDDR 0xFFF00008
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#define SDINT 0xFFF00014
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#endif /* _ASM_CPU_SH7750_H_ */
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