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https://github.com/brain-hackers/u-boot-brain
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![Jagan Teki](/assets/img/avatar_default.png)
Sync rk3399 dts(i) files from v5.7-rc1 linux-next. Reason: To get updated PCIe nodes and properties on respective dts(i) files. Summary: - sync won't include new board dts(i) - sync will add required files used on respective dts(i) - rk3399-puma-u-boot.dtsi spiflash label changed to norflash - move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi - move legacy max-frequency of sdhci into rk3399-u-boot.dtsi - update cross-ec-[keyboard|sbs].dtsi path as per U-Boot - keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
137 lines
2.5 KiB
Plaintext
137 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* FriendlyElec NanoPC-T4 board device tree source
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*
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* Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyarm.com)
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*
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* Copyright (c) 2018 Collabora Ltd.
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*/
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/dts-v1/;
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#include "rk3399-nanopi4.dtsi"
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/ {
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model = "FriendlyElec NanoPC-T4";
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compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
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vcc12v0_sys: vcc12v0-sys {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <12000000>;
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regulator-min-microvolt = <12000000>;
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regulator-name = "vcc12v0_sys";
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};
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vcc5v0_host0: vcc5v0-host0 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc5v0_host0";
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vin-supply = <&vcc5v0_sys>;
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};
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 1>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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recovery {
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label = "Recovery";
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linux,code = <KEY_VENDOR>;
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press-threshold-microvolt = <18000>;
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};
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};
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ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ir_rx>;
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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/*
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* With 20KHz PWM and an EVERCOOL EC4007H12SA fan, these levels
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* work out to 0, ~1200, ~3000, and 5000RPM respectively.
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*/
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cooling-levels = <0 12 18 255>;
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#cooling-cells = <2>;
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fan-supply = <&vcc12v0_sys>;
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pwms = <&pwm1 0 50000 0>;
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};
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};
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&cpu_thermal {
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trips {
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cpu_warm: cpu_warm {
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temperature = <55000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_hot: cpu_hot {
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temperature = <65000>;
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hysteresis = <2000>;
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type = "active";
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};
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};
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cooling-maps {
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map2 {
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trip = <&cpu_warm>;
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cooling-device = <&fan THERMAL_NO_LIMIT 1>;
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};
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map3 {
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trip = <&cpu_hot>;
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cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
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};
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};
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};
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&pcie0 {
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num-lanes = <4>;
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vpcie3v3-supply = <&vcc3v3_sys>;
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};
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&pinctrl {
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ir {
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ir_rx: ir-rx {
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/* external pullup to VCC3V3_SYS, despite being 1.8V :/ */
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rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>;
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};
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};
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};
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&sdhci {
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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};
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&u2phy0_host {
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phy-supply = <&vcc5v0_host0>;
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};
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&u2phy1_host {
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phy-supply = <&vcc5v0_host0>;
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};
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&vcc5v0_sys {
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vin-supply = <&vcc12v0_sys>;
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};
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&vcc3v3_sys {
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vin-supply = <&vcc12v0_sys>;
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};
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&vbus_typec {
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enable-active-high;
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gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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};
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