mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 00:48:52 +09:00
![Marek Vasut](/assets/img/avatar_default.png)
Convert the board to DM_ETH instead of legacy networking. This requires a minor addition to the DT to satisfy the requirement for specifying a PHY node. No functional change from board user perspective. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
324 lines
6.5 KiB
Plaintext
324 lines
6.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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/dts-v1/;
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#include "imx53-m53.dtsi"
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#include "imx53-m53menlo-u-boot.dtsi"
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/ {
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model = "MENLO M53 EMBEDDED DEVICE";
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compatible = "menlo,m53menlo", "fsl,imx53";
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led>;
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user1 {
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label = "TestLed601";
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gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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};
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user2 {
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label = "TestLed602";
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gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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eth {
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label = "EthLedYe";
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gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "none";
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};
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};
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panel {
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compatible = "edt,etm070080dh6";
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enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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reg_usbh1_vbus: regulator-usbh1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
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<&clks IMX5_CLK_CKO1_PODF>,
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<&clks IMX5_CLK_CKO1>;
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assigned-clock-parents = <&clks IMX5_CLK_AHB>;
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assigned-clock-rates = <133333334>, <33333334>, <33333334>;
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-handle = <ðphy0>;
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phy-mode = "rmii";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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touchscreen@38 {
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compatible = "edt,edt-ft5x06";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_edt_ft5x06>;
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interrupt-parent = <&gpio6>;
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interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
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wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
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};
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eeprom@50 {
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compatible = "atmel,24c64";
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reg = <0x50>;
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pagesize = <32>;
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};
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dac@60 {
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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};
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};
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&i2c2 {
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touchscreen@41 {
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status = "disabled";
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx53-m53evk {
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hoggrp {
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fsl,pins = <
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MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
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MX53_PAD_EIM_EB3__GPIO2_31 0x1d5
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MX53_PAD_PATA_DA_0__GPIO7_6 0x1d5
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MX53_PAD_GPIO_19__CCM_CLKO 0x1d5
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MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 0x1d5
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MX53_PAD_CSI0_DAT4__GPIO5_22 0x1d5
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MX53_PAD_CSI0_DAT5__GPIO5_23 0x1d5
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MX53_PAD_CSI0_DAT6__GPIO5_24 0x1d5
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MX53_PAD_CSI0_DAT7__GPIO5_25 0x1d5
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MX53_PAD_CSI0_DAT8__GPIO5_26 0x1d5
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MX53_PAD_CSI0_DAT9__GPIO5_27 0x1d5
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MX53_PAD_CSI0_DAT10__GPIO5_28 0x1d5
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MX53_PAD_CSI0_DAT11__GPIO5_29 0x1d5
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MX53_PAD_CSI0_DAT14__GPIO6_0 0x1d5
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>;
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};
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pinctrl_led: ledgrp {
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fsl,pins = <
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MX53_PAD_CSI0_DAT15__GPIO6_1 0x1d5
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MX53_PAD_CSI0_DAT16__GPIO6_2 0x1d5
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>;
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};
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX53_PAD_GPIO_7__CAN1_TXCAN 0x1c4
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MX53_PAD_GPIO_8__CAN1_RXCAN 0x1c4
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>;
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};
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pinctrl_can2: can2grp {
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fsl,pins = <
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MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1c4
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MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
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>;
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};
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pinctrl_display_gpio: display-gpiogrp {
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fsl,pins = <
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MX53_PAD_CSI0_DAT12__GPIO5_30 0x1d5 /* Reset */
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MX53_PAD_CSI0_DAT13__GPIO5_31 0x1d5 /* Interrupt */
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>;
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};
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pinctrl_edt_ft5x06: edt-ft5x06grp {
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fsl,pins = <
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MX53_PAD_PATA_DATA9__GPIO2_9 0x1d5 /* Reset */
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MX53_PAD_CSI0_DAT19__GPIO6_5 0x1d5 /* Interrupt */
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MX53_PAD_PATA_DATA10__GPIO2_10 0x1d5 /* Wake */
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
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MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
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MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX53_PAD_FEC_MDC__FEC_MDC 0x4
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MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
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MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
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MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
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MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
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MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
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MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
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MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
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MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
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MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
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MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
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MX53_PAD_GPIO_5__I2C3_SCL 0x400001e4
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>;
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};
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pinctrl_lvds0: lvds0grp {
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/* LVDS pins only have pin mux configuration */
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fsl,pins = <
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MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
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MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
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MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
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MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
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MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
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MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
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MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
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>;
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};
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pinctrl_usb: usbgrp {
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fsl,pins = <
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MX53_PAD_GPIO_2__GPIO1_2 0x1d5
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MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1d5
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>;
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};
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};
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};
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&ldb {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lvds0>;
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status = "okay";
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lvds0: lvds-channel@0 {
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reg = <0>;
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fsl,data-mapping = "spwg";
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fsl,data-width = <18>;
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status = "okay";
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port@2 {
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reg = <2>;
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lvds0_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb>;
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vbus-supply = <®_usbh1_vbus>;
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phy_type = "utmi";
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dr_mode = "peripheral";
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status = "okay";
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};
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&usbotg {
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dr_mode = "peripheral";
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status = "okay";
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};
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