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https://github.com/brain-hackers/u-boot-brain
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dddccd6913
Instead of using the internal 'tx_clk' clock source, it is also possible to use the pixel clock signal from the parallel LCD interface ('pclk') as the reference clock for PLL. The 'tx_clk' clock speed may be different on different boards/devices (the allowed range is 8MHz - 30MHz). Which is not very convenient, especially considering the need to know the exact 'tx_clk' clock speed. This clock speed may be difficult to identify without having device schematics and/or accurate documentation/sources every time. Using 'pclk' is free from all these problems. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
81 lines
3.1 KiB
Plaintext
81 lines
3.1 KiB
Plaintext
config VIDEO_X86
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bool "Enable x86 video driver support"
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depends on X86
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default n
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help
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Turn on this option to enable a very simple driver which uses vesa
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to discover the video mode and then provides a frame buffer for use
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by U-Boot.
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config VIDEO_LCD_SSD2828
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bool "SSD2828 bridge chip"
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default n
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---help---
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Support for the SSD2828 bridge chip, which can take pixel data coming
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from a parallel LCD interface and translate it on the fly into MIPI DSI
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interface for driving a MIPI compatible LCD panel. It uses SPI for
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configuration.
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config VIDEO_LCD_SSD2828_TX_CLK
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int "SSD2828 TX_CLK frequency (in MHz)"
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depends on VIDEO_LCD_SSD2828
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default 0
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---help---
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The frequency of the crystal, which is clocking SSD2828. It may be
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anything in the 8MHz-30MHz range and the exact value should be
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retrieved from the board schematics. Or in the case of Allwinner
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hardware, it can be usually found as 'lcd_xtal_freq' variable in
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FEX files. It can be also set to 0 for selecting PCLK from the
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parallel LCD interface instead of TX_CLK as the PLL clock source.
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config VIDEO_LCD_SSD2828_RESET
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string "RESET pin of SSD2828"
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depends on VIDEO_LCD_SSD2828
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default ""
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---help---
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The reset pin of SSD2828 chip. This takes a string in the format
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understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_SPI_CS
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string "SPI CS pin for LCD related config job"
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depends on VIDEO_LCD_SSD2828
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default ""
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---help---
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This is one of the SPI communication pins, involved in setting up a
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working LCD configuration. The exact role of SPI may differ for
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different hardware setups. The option takes a string in the format
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understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_SPI_SCLK
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string "SPI SCLK pin for LCD related config job"
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depends on VIDEO_LCD_SSD2828
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default ""
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---help---
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This is one of the SPI communication pins, involved in setting up a
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working LCD configuration. The exact role of SPI may differ for
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different hardware setups. The option takes a string in the format
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understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_SPI_MOSI
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string "SPI MOSI pin for LCD related config job"
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depends on VIDEO_LCD_SSD2828
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default ""
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---help---
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This is one of the SPI communication pins, involved in setting up a
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working LCD configuration. The exact role of SPI may differ for
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different hardware setups. The option takes a string in the format
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understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_SPI_MISO
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string "SPI MISO pin for LCD related config job (optional)"
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depends on VIDEO_LCD_SSD2828
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default ""
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---help---
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This is one of the SPI communication pins, involved in setting up a
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working LCD configuration. The exact role of SPI may differ for
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different hardware setups. If wired up, this pin may provide additional
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useful functionality. Such as bi-directional communication with the
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hardware and LCD panel id retrieval (if the panel can report it). The
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option takes a string in the format understood by 'name_to_gpio'
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function, e.g. PH1 for pin 1 of port H.
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