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https://github.com/brain-hackers/u-boot-brain
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f749db3a75
LS2085A is an ARMv8 implementation. This adds board support for emulator and simulator: Two DDR controllers UART2 is used as the console IFC timing is tightened for speedy booting Support DDR3 and DDR4 as separated targets Management Complex (MC) is enabled Support for GIC 500 (based on GICv3 arch) Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
17 lines
299 B
C
17 lines
299 B
C
/*
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* Copyright (C) 2014 Freescale Semiconductor
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __LS2_SIMU_H
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#define __LS2_SIMU_H
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#include "ls2085a_common.h"
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/* SMSC 91C111 ethernet configuration */
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#define CONFIG_SMC91111
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#define CONFIG_SMC91111_BASE (0x2210000)
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#endif /* __LS2_SIMU_H */
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