mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
224 lines
4.9 KiB
C
224 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Creative ZEN X-Fi3 board
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*
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* Copyright (C) 2013 Marek Vasut <marex@denx.de>
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*
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* Hardware investigation done by:
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*
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* Amaury Pouly <amaury.pouly@gmail.com>
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/iomux-mx23.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Functions
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*/
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK0, 480000);
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/* SSP0 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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return 0;
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}
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int dram_init(void)
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{
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return mxs_dram_init();
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}
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#ifdef CONFIG_CMD_MMC
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static int xfi3_mmc_cd(int id)
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{
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switch (id) {
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case 0:
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/* The SSP_DETECT is inverted on this board. */
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return gpio_get_value(MX23_PAD_SSP1_DETECT__GPIO_2_1);
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case 1:
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/* Phison bridge always present */
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return 1;
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default:
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return 0;
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}
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}
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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/* MicroSD slot */
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gpio_direction_input(MX23_PAD_SSP1_DETECT__GPIO_2_1);
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gpio_direction_output(MX23_PAD_GPMI_D07__GPIO_0_7, 0);
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ret = mxsmmc_initialize(bis, 0, NULL, xfi3_mmc_cd);
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if (ret)
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return ret;
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/* Phison SD-NAND bridge */
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ret = mxsmmc_initialize(bis, 1, NULL, xfi3_mmc_cd);
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return ret;
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}
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#endif
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#ifdef CONFIG_VIDEO_MXS
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static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
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{
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struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
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const unsigned int timeout = 0x10000;
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if (mxs_wait_mask_clr(®s->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
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timeout))
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return -ETIMEDOUT;
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writel((1 << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) |
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(1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
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®s->hw_lcdif_transfer_count);
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writel(LCDIF_CTRL_DATA_SELECT | LCDIF_CTRL_RUN,
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®s->hw_lcdif_ctrl_clr);
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if (data)
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writel(LCDIF_CTRL_DATA_SELECT, ®s->hw_lcdif_ctrl_set);
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writel(LCDIF_CTRL_RUN, ®s->hw_lcdif_ctrl_set);
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if (mxs_wait_mask_clr(®s->hw_lcdif_lcdif_stat_reg, 1 << 29,
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timeout))
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return -ETIMEDOUT;
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writel(payload, ®s->hw_lcdif_data);
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return mxs_wait_mask_clr(®s->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
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timeout);
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}
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static void mxsfb_write_register(uint32_t reg, uint32_t data)
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{
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mxsfb_write_byte(reg, 0);
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mxsfb_write_byte(data, 1);
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}
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static const struct {
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uint8_t reg;
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uint8_t delay;
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uint16_t val;
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} lcd_regs[] = {
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{ 0x01, 0, 0x001c },
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{ 0x02, 0, 0x0100 },
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/* Writing 0x30 to reg. 0x03 flips the LCD */
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{ 0x03, 0, 0x1038 },
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{ 0x08, 0, 0x0808 },
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/* This can contain 0x111 to rotate the LCD. */
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{ 0x0c, 0, 0x0000 },
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{ 0x0f, 0, 0x0c01 },
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{ 0x20, 0, 0x0000 },
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{ 0x21, 30, 0x0000 },
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/* Wait 30 mS here */
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{ 0x10, 0, 0x0a00 },
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{ 0x11, 30, 0x1038 },
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/* Wait 30 mS here */
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{ 0x12, 0, 0x1010 },
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{ 0x13, 0, 0x0050 },
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{ 0x14, 0, 0x4f58 },
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{ 0x30, 0, 0x0000 },
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{ 0x31, 0, 0x00db },
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{ 0x32, 0, 0x0000 },
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{ 0x33, 0, 0x0000 },
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{ 0x34, 0, 0x00db },
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{ 0x35, 0, 0x0000 },
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{ 0x36, 0, 0x00af },
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{ 0x37, 0, 0x0000 },
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{ 0x38, 0, 0x00db },
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{ 0x39, 0, 0x0000 },
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{ 0x50, 0, 0x0000 },
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{ 0x51, 0, 0x0705 },
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{ 0x52, 0, 0x0e0a },
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{ 0x53, 0, 0x0300 },
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{ 0x54, 0, 0x0a0e },
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{ 0x55, 0, 0x0507 },
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{ 0x56, 0, 0x0000 },
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{ 0x57, 0, 0x0003 },
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{ 0x58, 0, 0x090a },
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{ 0x59, 30, 0x0a09 },
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/* Wait 30 mS here */
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{ 0x07, 30, 0x1017 },
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/* Wait 40 mS here */
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{ 0x36, 0, 0x00af },
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{ 0x37, 0, 0x0000 },
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{ 0x38, 0, 0x00db },
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{ 0x39, 0, 0x0000 },
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{ 0x20, 0, 0x0000 },
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{ 0x21, 0, 0x0000 },
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};
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void mxsfb_system_setup(void)
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{
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struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
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int i;
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/* Switch the LCDIF into System-Mode */
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writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DOTCLK_MODE |
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LCDIF_CTRL_BYPASS_COUNT, ®s->hw_lcdif_ctrl_clr);
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/* Restart the SmartLCD controller */
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mdelay(50);
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writel(1, ®s->hw_lcdif_ctrl1_set);
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mdelay(50);
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writel(1, ®s->hw_lcdif_ctrl1_clr);
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mdelay(50);
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writel(1, ®s->hw_lcdif_ctrl1_set);
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mdelay(50);
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/* Program the SmartLCD controller */
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writel(LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, ®s->hw_lcdif_ctrl1_set);
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writel((0x03 << LCDIF_TIMING_CMD_HOLD_OFFSET) |
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(0x03 << LCDIF_TIMING_CMD_SETUP_OFFSET) |
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(0x03 << LCDIF_TIMING_DATA_HOLD_OFFSET) |
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(0x02 << LCDIF_TIMING_DATA_SETUP_OFFSET),
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®s->hw_lcdif_timing);
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/*
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* OTM2201A init and configuration sequence.
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*/
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for (i = 0; i < ARRAY_SIZE(lcd_regs); i++) {
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mxsfb_write_register(lcd_regs[i].reg, lcd_regs[i].val);
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if (lcd_regs[i].delay)
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mdelay(lcd_regs[i].delay);
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}
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/* Turn on Framebuffer Upload Mode */
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mxsfb_write_byte(0x22, 0);
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writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
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®s->hw_lcdif_ctrl_set);
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}
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#endif
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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/* Turn on PWM backlight */
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gpio_direction_output(MX23_PAD_PWM2__GPIO_1_28, 1);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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usb_eth_initialize(bis);
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return 0;
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}
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