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https://github.com/brain-hackers/u-boot-brain
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7c02bc9649
The Jetson Nano Developer Kit is a Tegra X1-based development board. It is similar to Jetson TX1 but it is not pin compatible. It features 4GB of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot used for storage. HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI Ethernet controller provides onboard network connectivity. NVMe support has also been added. Env save is at the end of QSPI (4MB-8K). A 40-pin header on the board can be used to extend the capabilities and exposed interfaces of the Jetson Nano. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2018-2019 NVIDIA Corporation.
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*/
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#ifndef _P3450_0000_H
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#define _P3450_0000_H
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#include <linux/sizes.h>
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#include "tegra210-common.h"
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/* High-level configuration options */
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#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000"
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/* Board-specific serial config */
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#define CONFIG_TEGRA_ENABLE_UARTA
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/* Only MMC/PXE/DHCP for now, add USB back in later when supported */
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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/* Environment at end of QSPI, in the VER partition */
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#define CONFIG_ENV_SPI_MAX_HZ 48000000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_0
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#define CONFIG_SPI_FLASH_SIZE (4 << 20)
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#define CONFIG_PREBOOT
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#define BOARD_EXTRA_ENV_SETTINGS \
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"preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \
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"load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \
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"source ${scriptaddr}; " \
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"fi\0"
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/* General networking support */
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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/* Crystal is 38.4MHz. clk_m runs at half that rate */
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#define COUNTER_FREQUENCY 19200000
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#endif /* _P3450_0000_H */
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