mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
c37207d7f5
U-Boot allows for configurable prompt strings using the CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far, the assumption was that any such user defined problts would contain exactly one "%d" format specifier. But some boards did not. To allow for flexible boot prompts without adding too complex code we now allow to specify the whole list of printf() arguments in the user definition. This is powerful, but requires a responsible user who really understands what he is doing, as he needs to know for exanple which variables are available in the respective context. Signed-off-by: Wolfgang Denk <wd@denx.de>
405 lines
11 KiB
C
405 lines
11 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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*
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* Configuration settings for the AmigaOneG3SE board.
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*
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*/
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/* ------------------------------------------------------------------------- */
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_AMIGAONEG3SE 1
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#define CONFIG_BOARD_EARLY_INIT_F 1
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#define CONFIG_MISC_INIT_R 1
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#define CONFIG_VERY_BIG_RAM 1
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 9600
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#undef CONFIG_CLOCKS_IN_MHZ /* clocks passed to Linux in Hz */
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#define CONFIG_BOOTARGS "root=/dev/ram rw ramdisk_size=4096"
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_MAC_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_AMIGA_PARTITION
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_FDC
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_CONSOLE|
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_PCI
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#define CONFIG_PCI 1
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/* #define CONFIG_PCI_SCAN_SHOW 1 */
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#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
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#define atoi(x) simple_strtoul(x,NULL,10)
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "] " /* Monitor Command Prompt */
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#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
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/* #undef CFG_HUSH_PARSER */
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#ifdef CFG_HUSH_PARSER
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#define CFG_PROMPT_HUSH_PS2 "> "
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#endif
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Print Buffer Size
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*/
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#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
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#define CFG_MAXARGS 64 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_LOAD_ADDR 0x00500000 /* Default load address */
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_FLASH_BASE 0xFFF00000
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#define CFG_FLASH_MAX_SIZE 0x00080000
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/* Maximum amount of RAM.
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*/
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#define CFG_MAX_RAM_SIZE 0x80000000 /* 2G */
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#define CFG_RESET_ADDRESS 0xFFF00100
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN (768 << 10) /* Reserve 512 kB for Monitor */
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#define CFG_MALLOC_LEN (2500 << 10) /* Reserve 128 kB for malloc() */
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#if CFG_MONITOR_BASE >= CFG_SDRAM_BASE && \
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CFG_MONITOR_BASE < CFG_SDRAM_BASE + CFG_MAX_RAM_SIZE
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#define CFG_RAMBOOT
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#else
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#undef CFG_RAMBOOT
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#endif
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#define CFG_MEMTEST_START 0x00004000 /* memtest works on */
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#define CFG_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area
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*/
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/* Size in bytes reserved for initial data
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*/
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/* HJF: used to be 0x400000 */
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#define CFG_INIT_RAM_ADDR 0x40000000
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#define CFG_INIT_RAM_END 0x8000
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#define CFG_GBL_DATA_SIZE 128
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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#define CFG_INIT_RAM_LOCK
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/*
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* Temporary buffer for serial data until the real serial driver
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* is initialised (memtest will destroy this buffer)
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*/
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#define CFG_SCONSOLE_ADDR CFG_INIT_RAM_ADDR
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#define CFG_SCONSOLE_SIZE 0x0002000
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/* SDRAM 0 - 256MB
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*/
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/*HJF: #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
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#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_4M | BATU_VS | BATU_VP)
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#define CFG_DBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
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#define CFG_DBAT0U CFG_IBAT0U*/
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#define CFG_DBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
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#define CFG_DBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
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#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
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/* PCI Range
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*/
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#define CFG_DBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
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#define CFG_DBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CFG_IBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
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#define CFG_IBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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/* HJF:
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#define CFG_IBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATL_PP_RW)
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#define CFG_IBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CFG_DBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW )
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#define CFG_DBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP)
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*/
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/* Init RAM in the CPU DCache (no backing memory)
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*/
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#define CFG_DBAT2L (CFG_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE)
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#define CFG_DBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
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/* This used to be commented out */
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#define CFG_IBAT2L CFG_DBAT2L
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/* This here too */
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#define CFG_IBAT2U CFG_DBAT2U
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/* I/O and PCI memory at 0xf0000000
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*/
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#define CFG_DBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
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#define CFG_DBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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#define CFG_IBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
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#define CFG_IBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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*/
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#define CFG_HZ 1000
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#define CFG_BUS_HZ 133000000 /* bus speed - 100 mhz */
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#define CFG_CPU_CLK 133000000
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#define CFG_BUS_CLK 133000000
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
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#define CFG_MAX_FLASH_SECT 8 /* Max number of sectors in one bank */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */
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/*
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* Environment is stored in NVRAM.
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*/
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#define CFG_ENV_IS_IN_NVRAM 1
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#define CFG_ENV_ADDR 0xFD0E0000 /* This should be 0xFD0E0000, but we skip bytes to
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* protect softex's settings for now.
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* Original 768 bytes where not enough.
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*/
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#define CFG_ENV_SIZE 0x8000 /* Size of the Environment. See comment above */
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#define CFG_CONSOLE_IS_IN_ENV 1 /* stdin/stdout/stderr are in environment */
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#define CFG_CONSOLE_OVERWRITE_ROUTINE 1
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#define CONFIG_ENV_OVERWRITE 1
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CFG_CACHELINE_SIZE 32
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#if defined(CONFIG_CMD_KGDB)
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# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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#endif
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/*
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* L2 cache
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*/
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#define CFG_L2
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#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
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L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
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#define L2_ENABLE (L2_INIT | L2CR_L2E)
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/*
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* Internal Definitions
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*
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* Boot Flags
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*/
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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/*-----------------------------------------------------------------------
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* IDE ATAPI Configuration
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*/
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#define CONFIG_ATAPI 1
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#define CFG_IDE_MAXBUS 2
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#define CFG_IDE_MAXDEVICE 4
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#define CONFIG_ISO_PARTITION 1
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#define CFG_ATA_BASE_ADDR 0xFE000000 /* was: via_get_base_addr() */
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#define CFG_ATA_IDE0_OFFSET 0x1F0
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#define CFG_ATA_IDE1_OFFSET 0x170
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#define CFG_ATA_REG_OFFSET 0
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#define CFG_ATA_DATA_OFFSET 0
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#define CFG_ATA_ALT_OFFSET 0x0200
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/*-----------------------------------------------------------------------
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* Disk-On-Chip configuration
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*/
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#define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
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#define CFG_DOC_SUPPORT_2000
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#undef CFG_DOC_SUPPORT_MILLENNIUM
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/*-----------------------------------------------------------------------
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RTC
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*/
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#define CONFIG_RTC_MC146818
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/*-----------------------------------------------------------------------
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* NS16550 Configuration
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*/
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#define CFG_NS16550
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#define CFG_NS16550_COM1 0xFE0003F8
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#define CFG_NS16550_COM2 0xFE0002F8
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#define CFG_NS16550_REG_SIZE 1
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/* base address for ISA I/O
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*/
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#define CFG_ISA_IO_BASE_ADDRESS 0xFE000000
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/* ISA Interrupt stuff (taken from JWL) */
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#define ISA_INT1_OCW1 0x21
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#define ISA_INT2_OCW1 0xA1
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#define ISA_INT1_OCW2 0x20
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#define ISA_INT2_OCW2 0xA0
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#define ISA_INT1_OCW3 0x20
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#define ISA_INT2_OCW3 0xA0
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#define ISA_INT1_ICW1 0x20
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#define ISA_INT2_ICW1 0xA0
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#define ISA_INT1_ICW2 0x21
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#define ISA_INT2_ICW2 0xA1
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#define ISA_INT1_ICW3 0x21
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#define ISA_INT2_ICW3 0xA1
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#define ISA_INT1_ICW4 0x21
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#define ISA_INT2_ICW4 0xA1
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/*
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* misc
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*/
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#define CONFIG_NET_MULTI
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#define CFG_BOARD_ASM_INIT
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#define CONFIG_LAST_STAGE_INIT
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/* #define CONFIG_ETHADDR 00:09:D2:10:00:76 */
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/* #define CONFIG_IPADDR 192.168.0.2 */
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/* #define CONFIG_NETMASK 255.255.255.240 */
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/* #define CONFIG_GATEWAYIP 192.168.0.3 */
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#define CONFIG_3COM
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/* #define CONFIG_BOOTP_RANDOM_DELAY */
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/*
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* USB configuration
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*/
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#define CONFIG_USB_UHCI 1
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_USB_KEYBOARD 1
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#define CFG_DEVICE_DEREGISTER 1 /* needed by CONFIG_USB_KEYBOARD */
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/*
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* Autoboot stuff
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*/
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#define CONFIG_BOOTDELAY 5 /* Boot automatically after five seconds */
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#define CONFIG_PREBOOT ""
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#define CONFIG_BOOTCOMMAND "fdcboot; diskboot"
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#define CONFIG_MENUPROMPT \
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"Press any key to interrupt autoboot: %2d ", bootdelay
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#define CONFIG_MENUKEY ' '
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#define CONFIG_MENUCOMMAND "menu"
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/* #define CONFIG_AUTOBOOT_KEYED */
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/*
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* Extra ENV stuff
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"stdout=vga\0" \
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"stdin=ps2kbd\0" \
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"ide_doreset=on\0" \
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"ide_maxbus=2\0" \
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"ide_cd_timeout=30\0" \
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"menucmd=menu\0" \
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"pci_irqa=9\0" \
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"pci_irqa_select=edge\0" \
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"pci_irqb=10\0" \
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"pci_irqb_select=edge\0" \
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"pci_irqc=11\0" \
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"pci_irqc_select=edge\0" \
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"pci_irqd=7\0" \
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"pci_irqd_select=edge\0"
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/* #define CONFIG_MII 1 */
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/* #define CONFIG_BITBANGMII 1 */
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#endif /* __CONFIG_H */
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