mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
de9ac9a1b9
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
57 lines
1.3 KiB
Makefile
57 lines
1.3 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifeq ($(CONFIG_$(SPL_)X86_64),y)
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extra-y = start64.o
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else
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extra-y = start.o
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endif
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extra-$(CONFIG_$(SPL_)X86_16BIT_INIT) += resetvec.o start16.o
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obj-y += cpu.o cpu_x86.o
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ifndef CONFIG_$(SPL_)X86_64
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AFLAGS_REMOVE_call32.o := -mregparm=3 \
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$(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
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AFLAGS_call32.o := -fpic -fshort-wchar
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extra-y += call32.o
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endif
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obj-y += intel_common/
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obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
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obj-$(CONFIG_INTEL_BRASWELL) += braswell/
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obj-$(CONFIG_INTEL_BROADWELL) += broadwell/
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obj-$(CONFIG_SYS_COREBOOT) += coreboot/
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obj-$(CONFIG_EFI_APP) += efi/
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obj-$(CONFIG_QEMU) += qemu/
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obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
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obj-$(CONFIG_INTEL_QUARK) += quark/
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obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
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obj-$(CONFIG_INTEL_TANGIER) += tangier/
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obj-y += lapic.o ioapic.o
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obj-y += irq.o
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ifndef CONFIG_$(SPL_)X86_64
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obj-$(CONFIG_SMP) += mp_init.o
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endif
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obj-y += mtrr.o
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obj-$(CONFIG_PCI) += pci.o
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ifndef CONFIG_$(SPL_)X86_64
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obj-$(CONFIG_SMP) += sipi_vector.o
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endif
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obj-y += turbo.o
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obj-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.o
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ifeq ($(CONFIG_$(SPL_)X86_64),y)
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obj-y += x86_64/
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else
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obj-y += i386/
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endif
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