mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-22 04:30:31 +09:00
2dbba24088
Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX. Those definition might be confused with MDIO PHY definitions. This patch does the following changes: - PHY_TYPE_XX --> COMPHY_TYPE_XX - PHY_SPEED_XX --> COMPHY_SPEED_XX This improves readability, no functional change. Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2015-2016 Marvell International Ltd.
|
|
*/
|
|
|
|
#ifndef _COMPHY_DATA_H_
|
|
#define _COMPHY_DATA_H_
|
|
|
|
#define COMPHY_SPEED_1_25G 0
|
|
#define COMPHY_SPEED_1_5G 1
|
|
#define COMPHY_SPEED_2_5G 2
|
|
#define COMPHY_SPEED_3G 3
|
|
#define COMPHY_SPEED_3_125G 4
|
|
#define COMPHY_SPEED_5G 5
|
|
#define COMPHY_SPEED_5_15625G 6
|
|
#define COMPHY_SPEED_6G 7
|
|
#define COMPHY_SPEED_6_25G 8
|
|
#define COMPHY_SPEED_10_3125G 9
|
|
#define COMPHY_SPEED_MAX 10
|
|
#define COMPHY_SPEED_INVALID 0xff
|
|
|
|
#define COMPHY_TYPE_UNCONNECTED 0
|
|
#define COMPHY_TYPE_PEX0 1
|
|
#define COMPHY_TYPE_PEX1 2
|
|
#define COMPHY_TYPE_PEX2 3
|
|
#define COMPHY_TYPE_PEX3 4
|
|
#define COMPHY_TYPE_SATA0 5
|
|
#define COMPHY_TYPE_SATA1 6
|
|
#define COMPHY_TYPE_SATA2 7
|
|
#define COMPHY_TYPE_SATA3 8
|
|
#define COMPHY_TYPE_SGMII0 9
|
|
#define COMPHY_TYPE_SGMII1 10
|
|
#define COMPHY_TYPE_SGMII2 11
|
|
#define COMPHY_TYPE_SGMII3 12
|
|
#define COMPHY_TYPE_QSGMII 13
|
|
#define COMPHY_TYPE_USB3 14
|
|
#define COMPHY_TYPE_USB3_HOST0 15
|
|
#define COMPHY_TYPE_USB3_HOST1 16
|
|
#define COMPHY_TYPE_USB3_DEVICE 17
|
|
#define COMPHY_TYPE_XAUI0 18
|
|
#define COMPHY_TYPE_XAUI1 19
|
|
#define COMPHY_TYPE_XAUI2 20
|
|
#define COMPHY_TYPE_XAUI3 21
|
|
#define COMPHY_TYPE_RXAUI0 22
|
|
#define COMPHY_TYPE_RXAUI1 23
|
|
#define COMPHY_TYPE_SFI 24
|
|
#define COMPHY_TYPE_IGNORE 25
|
|
#define COMPHY_TYPE_MAX 26
|
|
#define COMPHY_TYPE_INVALID 0xff
|
|
|
|
#define COMPHY_POLARITY_NO_INVERT 0
|
|
#define COMPHY_POLARITY_TXD_INVERT 1
|
|
#define COMPHY_POLARITY_RXD_INVERT 2
|
|
#define COMPHY_POLARITY_ALL_INVERT \
|
|
(COMPHY_POLARITY_TXD_INVERT | COMPHY_POLARITY_RXD_INVERT)
|
|
|
|
#define UTMI_PHY_TO_USB3_HOST0 0
|
|
#define UTMI_PHY_TO_USB3_HOST1 1
|
|
#define UTMI_PHY_TO_USB3_DEVICE0 2
|
|
#define UTMI_PHY_INVALID 0xff
|
|
|
|
#endif /* _COMPHY_DATA_H_ */
|
|
|