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3ce0808625
Add NS3 pads definitions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2020 Broadcom.
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*/
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#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
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#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
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/* Alternate functions available in MUX controller */
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#define MODE_NITRO 0
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#define MODE_NAND 1
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#define MODE_PNOR 2
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#define MODE_GPIO 3
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/* Pad configuration attribute */
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#define PAD_SLEW_RATE_ENA BIT(0)
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#define PAD_SLEW_RATE_ENA_MASK BIT(0)
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#define PAD_DRIVE_STRENGTH_2_MA (0 << 1)
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#define PAD_DRIVE_STRENGTH_4_MA BIT(1)
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#define PAD_DRIVE_STRENGTH_6_MA (2 << 1)
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#define PAD_DRIVE_STRENGTH_8_MA (3 << 1)
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#define PAD_DRIVE_STRENGTH_10_MA (4 << 1)
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#define PAD_DRIVE_STRENGTH_12_MA (5 << 1)
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#define PAD_DRIVE_STRENGTH_14_MA (6 << 1)
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#define PAD_DRIVE_STRENGTH_16_MA (7 << 1)
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#define PAD_DRIVE_STRENGTH_MASK (7 << 1)
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#define PAD_PULL_UP_ENA BIT(4)
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#define PAD_PULL_UP_ENA_MASK BIT(4)
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#define PAD_PULL_DOWN_ENA BIT(5)
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#define PAD_PULL_DOWN_ENA_MASK BIT(5)
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#define PAD_INPUT_PATH_DIS BIT(6)
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#define PAD_INPUT_PATH_DIS_MASK BIT(6)
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#define PAD_HYSTERESIS_ENA BIT(7)
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#define PAD_HYSTERESIS_ENA_MASK BIT(7)
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#endif
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