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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
308 lines
7.2 KiB
C
308 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <config.h>
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#include <net.h>
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#include <netdev.h>
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#ifdef CONFIG_MCF547x_8x
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#include <asm/fsl_mcdmafec.h>
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#else
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#include <asm/fec.h>
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#endif
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#include <asm/immap.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_CMD_NET)
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#undef MII_DEBUG
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#undef ET_DEBUG
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/*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
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#if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
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#include <miiphy.h>
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/* Make MII read/write commands for the FEC. */
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#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
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(REG & 0x1f) << 18))
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#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
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(REG & 0x1f) << 18) | (VAL & 0xffff))
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#ifndef CONFIG_SYS_UNSPEC_PHYID
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# define CONFIG_SYS_UNSPEC_PHYID 0
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#endif
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#ifndef CONFIG_SYS_UNSPEC_STRID
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# define CONFIG_SYS_UNSPEC_STRID 0
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#endif
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#ifdef CONFIG_MCF547x_8x
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typedef struct fec_info_dma FEC_INFO_T;
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#define FEC_T fecdma_t
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#else
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typedef struct fec_info_s FEC_INFO_T;
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#define FEC_T fec_t
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#endif
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typedef struct phy_info_struct {
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u32 phyid;
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char *strid;
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} phy_info_t;
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phy_info_t phyinfo[] = {
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{0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
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{0x00406322, "BCM5222"}, /* Broadcom 5222 */
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{0x02a80150, "Intel82555"}, /* Intel 82555 */
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{0x0016f870, "LSI80225"}, /* LSI 80225 */
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{0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
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{0x78100000, "LXT970"}, /* LXT970 */
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{0x001378e0, "LXT971"}, /* LXT971 and 972 */
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{0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
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{0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
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{0x20005CE1, "N83640"}, /* National 83640 */
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{0x20005C90, "N83848"}, /* National 83848 */
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{0x20005CA2, "N83849"}, /* National 83849 */
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{0x01814400, "QS6612"}, /* QS6612 */
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#if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
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{CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
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#endif
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{0, 0}
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};
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/*
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* mii_init -- Initialize the MII for MII command without ethernet
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* This function is a subset of eth_init
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*/
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void mii_reset(FEC_INFO_T *info)
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{
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volatile FEC_T *fecp = (FEC_T *) (info->miibase);
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int i;
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fecp->ecr = FEC_ECR_RESET;
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for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
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udelay(1);
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}
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if (i == FEC_RESET_DELAY)
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printf("FEC_RESET_DELAY timeout\n");
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}
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/* send command to phy using mii, wait for result */
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uint mii_send(uint mii_cmd)
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{
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FEC_INFO_T *info;
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volatile FEC_T *ep;
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struct eth_device *dev;
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uint mii_reply;
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int j = 0;
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/* retrieve from register structure */
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dev = eth_get_dev();
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info = dev->priv;
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ep = (FEC_T *) info->miibase;
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ep->mmfr = mii_cmd; /* command to phy */
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/* wait for mii complete */
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while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
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udelay(1);
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j++;
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}
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if (j >= MCFFEC_TOUT_LOOP) {
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printf("MII not complete\n");
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return -1;
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}
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mii_reply = ep->mmfr; /* result from phy */
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ep->eir = FEC_EIR_MII; /* clear MII complete */
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#ifdef ET_DEBUG
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printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
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__FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
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#endif
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return (mii_reply & 0xffff); /* data read from phy */
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}
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#endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
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#if defined(CONFIG_SYS_DISCOVER_PHY)
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int mii_discover_phy(struct eth_device *dev)
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{
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#define MAX_PHY_PASSES 11
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FEC_INFO_T *info = dev->priv;
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int phyaddr, pass;
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uint phyno, phytype;
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int i, found = 0;
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if (info->phyname_init)
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return info->phy_addr;
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phyaddr = -1; /* didn't find a PHY yet */
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for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
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if (pass > 1) {
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/* PHY may need more time to recover from reset.
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* The LXT970 needs 50ms typical, no maximum is
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* specified, so wait 10ms before try again.
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* With 11 passes this gives it 100ms to wake up.
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*/
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udelay(10000); /* wait 10ms */
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}
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for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
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phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
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#ifdef ET_DEBUG
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printf("PHY type 0x%x pass %d type\n", phytype, pass);
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#endif
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if (phytype == 0xffff)
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continue;
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phyaddr = phyno;
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phytype <<= 16;
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phytype |=
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mii_send(mk_mii_read(phyno, MII_PHYSID2));
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#ifdef ET_DEBUG
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printf("PHY @ 0x%x pass %d\n", phyno, pass);
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#endif
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for (i = 0; (i < ARRAY_SIZE(phyinfo))
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&& (phyinfo[i].phyid != 0); i++) {
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if (phyinfo[i].phyid == phytype) {
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#ifdef ET_DEBUG
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printf("phyid %x - %s\n",
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phyinfo[i].phyid,
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phyinfo[i].strid);
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#endif
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strcpy(info->phy_name, phyinfo[i].strid);
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info->phyname_init = 1;
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found = 1;
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break;
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}
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}
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if (!found) {
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#ifdef ET_DEBUG
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printf("0x%08x\n", phytype);
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#endif
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strcpy(info->phy_name, "unknown");
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info->phyname_init = 1;
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break;
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}
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}
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}
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if (phyaddr < 0)
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printf("No PHY device found.\n");
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return phyaddr;
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}
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#endif /* CONFIG_SYS_DISCOVER_PHY */
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void mii_init(void) __attribute__((weak,alias("__mii_init")));
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void __mii_init(void)
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{
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FEC_INFO_T *info;
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volatile FEC_T *fecp;
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struct eth_device *dev;
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int miispd = 0, i = 0;
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u16 status = 0;
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u16 linkgood = 0;
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/* retrieve from register structure */
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dev = eth_get_dev();
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info = dev->priv;
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fecp = (FEC_T *) info->miibase;
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fecpin_setclear(dev, 1);
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mii_reset(info);
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/* We use strictly polling mode only */
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fecp->eimr = 0;
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/* Clear any pending interrupt */
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fecp->eir = 0xffffffff;
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/* Set MII speed */
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miispd = (gd->bus_clk / 1000000) / 5;
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fecp->mscr = miispd << 1;
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info->phy_addr = mii_discover_phy(dev);
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while (i < MCFFEC_TOUT_LOOP) {
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status = 0;
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i++;
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/* Read PHY control register */
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miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
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/* If phy set to autonegotiate, wait for autonegotiation done,
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* if phy is not autonegotiating, just wait for link up.
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*/
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if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
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linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
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} else {
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linkgood = BMSR_LSTATUS;
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}
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/* Read PHY status register */
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miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
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if ((status & linkgood) == linkgood)
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break;
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udelay(1);
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}
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if (i >= MCFFEC_TOUT_LOOP) {
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printf("Link UP timeout\n");
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}
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/* adapt to the duplex and speed settings of the phy */
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info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
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info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
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}
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/*
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* Read and write a MII PHY register, routines used by MII Utilities
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*
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* FIXME: These routines are expected to return 0 on success, but mii_send
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* does _not_ return an error code. Maybe 0xFFFF means error, i.e.
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* no PHY connected...
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* For now always return 0.
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* FIXME: These routines only work after calling eth_init() at least once!
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* Otherwise they hang in mii_send() !!! Sorry!
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*/
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int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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short rdreg; /* register working value */
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#ifdef MII_DEBUG
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printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
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#endif
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rdreg = mii_send(mk_mii_read(addr, reg));
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#ifdef MII_DEBUG
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printf("0x%04x\n", rdreg);
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#endif
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return rdreg;
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}
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int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 value)
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{
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#ifdef MII_DEBUG
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printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
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#endif
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mii_send(mk_mii_write(addr, reg, value));
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return 0;
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}
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#endif /* CONFIG_CMD_NET */
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