mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010 Samsung Electronics
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* Naveen Krishna Ch <ch.naveen@samsung.com>
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*
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* Note: This file contains the register description for SROMC
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*/
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#ifndef __ASM_ARCH_SROMC_H_
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#define __ASM_ARCH_SROMC_H_
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#define SROMC_DATA16_WIDTH(x) (1<<((x*4)+0))
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#define SROMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
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/* 1-> Byte base address*/
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#define SROMC_WAIT_ENABLE(x) (1<<((x*4)+2))
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#define SROMC_BYTE_ENABLE(x) (1<<((x*4)+3))
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#define SROMC_BC_TACS(x) (x << 28) /* address set-up */
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#define SROMC_BC_TCOS(x) (x << 24) /* chip selection set-up */
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#define SROMC_BC_TACC(x) (x << 16) /* access cycle */
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#define SROMC_BC_TCOH(x) (x << 12) /* chip selection hold */
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#define SROMC_BC_TAH(x) (x << 8) /* address holding time */
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#define SROMC_BC_TACP(x) (x << 4) /* page mode access cycle */
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#define SROMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
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#ifndef __ASSEMBLY__
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struct s5p_sromc {
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unsigned int bw;
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unsigned int bc[4];
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};
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#endif /* __ASSEMBLY__ */
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/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
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void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
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enum {
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FDT_SROM_PMC,
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FDT_SROM_TACP,
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FDT_SROM_TAH,
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FDT_SROM_TCOH,
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FDT_SROM_TACC,
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FDT_SROM_TCOS,
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FDT_SROM_TACS,
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FDT_SROM_TIMING_COUNT,
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};
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struct fdt_sromc {
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u8 bank; /* srom bank number */
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u8 width; /* bus width in bytes */
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unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
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};
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#endif /* __ASM_ARCH_SROMC_H_ */
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