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022b02064a
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
26 lines
540 B
C
26 lines
540 B
C
/*
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* (C) Copyright 2013 Xilinx, Inc.
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*
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* Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards
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* See zynq_common.h for Zynq common configs
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQ_ZC70X_H
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#define __CONFIG_ZYNQ_ZC70X_H
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#define CONFIG_ZYNQ_SERIAL_UART1
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_I2C0
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#define CONFIG_ZYNQ_BOOT_FREEBSD
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#include <configs/zynq-common.h>
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#endif /* __CONFIG_ZYNQ_ZC70X_H */
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