SRICHARAN R 77efdeb758 ARM: OMAP5: dmm: Create a tiler trap section. ... The unmapped entries in tiler space are set with values 0xFF. So creating a DMM section of size 16MB at 0xFF000000 with ADDRSPACE set to 0x2. This way all the unmapped entry accesses to tiler will be trapped by the EMIF and a error response is sent to the L3 interconnect. L3 errors are inturn reported to MPU. Note that here the tiler trap section is overlapping with the actual ddr physical space and we lose 16MB out of the total 2GB. Signed-off-by: R Sricharan <r.sricharan@ti.com>		2012-07-07 14:07:22 +02:00
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cpu	ARM: OMAP5: dmm: Create a tiler trap section.	2012-07-07 14:07:22 +02:00
dts	tegra: fdt: Add keyboard controller definition	2012-05-15 08:31:40 +02:00
include/asm	am33xx: Do not call init_timer twice	2012-07-07 14:07:21 +02:00
lib	net: move bootfile init into eth_initialize	2012-05-15 17:32:33 -05:00
config.mk	Makefile: Add a 'checkthumb' rule	2012-05-15 08:31:26 +02:00