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https://github.com/brain-hackers/u-boot-brain
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401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
60 lines
1.2 KiB
C
60 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*
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* U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT).
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* The CLINT block holds memory-mapped control and status registers
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* associated with software and timer interrupts.
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <linux/err.h>
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/* MSIP registers */
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#define MSIP_REG(base, hart) ((ulong)(base) + (hart) * 4)
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DECLARE_GLOBAL_DATA_PTR;
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int riscv_init_ipi(void)
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{
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int ret;
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struct udevice *dev;
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ret = uclass_get_device_by_driver(UCLASS_TIMER,
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DM_DRIVER_GET(sifive_clint), &dev);
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if (ret)
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return ret;
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gd->arch.clint = dev_read_addr_ptr(dev);
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if (!gd->arch.clint)
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return -EINVAL;
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return 0;
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}
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int riscv_send_ipi(int hart)
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{
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writel(1, (void __iomem *)MSIP_REG(gd->arch.clint, hart));
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return 0;
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}
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int riscv_clear_ipi(int hart)
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{
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writel(0, (void __iomem *)MSIP_REG(gd->arch.clint, hart));
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return 0;
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}
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int riscv_get_ipi(int hart, int *pending)
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{
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*pending = readl((void __iomem *)MSIP_REG(gd->arch.clint, hart));
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return 0;
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}
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