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https://github.com/brain-hackers/u-boot-brain
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3eb90bad65
According to the PPC reference implementation the udelay() function is responsible for resetting the watchdog timer as frequently as needed. Most other architectures do not meet that requirement, so long-running operations might result in a watchdog reset. This patch adds a generic udelay() function which takes care of resetting the watchdog before calling an architecture-specific __udelay(). Signed-off-by: Ingo van Lil <inguin@gmx.de>
118 lines
2.4 KiB
C
118 lines
2.4 KiB
C
/*
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* Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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* Copyright (C) 2008 Renesas Solutions Corp.
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */
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#define CMT_CMCSR_CALIB 0x0000
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#define CMT_MAX_COUNTER (0xFFFFFFFF)
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#define CMT_TIMER_RESET (0xFFFF)
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static vu_long cmt0_timer;
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static void cmt_timer_start(unsigned int timer)
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{
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writew(readw(CMSTR) | 0x01, CMSTR);
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}
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static void cmt_timer_stop(unsigned int timer)
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{
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writew(readw(CMSTR) & ~0x01, CMSTR);
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}
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int timer_init(void)
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{
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cmt0_timer = 0;
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/* Divide clock by 32 */
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readw(CMCSR_0);
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writew(CMT_CMCSR_INIT, CMCSR_0);
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/* User Device 0 only */
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cmt_timer_stop(0);
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set_timer(CMT_TIMER_RESET);
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cmt_timer_start(0);
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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return cmt0_timer;
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}
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static vu_long cmcnt = 0;
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static unsigned long get_usec (void)
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{
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ulong data = readw(CMCNT_0);
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if (data >= cmcnt)
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cmcnt = data - cmcnt;
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else
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cmcnt = (CMT_TIMER_RESET - cmcnt) + data;
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if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER)
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cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER);
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else
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cmt0_timer += cmcnt;
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cmcnt = data;
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return cmt0_timer;
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}
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/* return msec */
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ulong get_timer(ulong base)
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{
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return (get_usec() / 1000) - base;
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}
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void set_timer(ulong t)
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{
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writew((u16) t, CMCOR_0);
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}
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void reset_timer(void)
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{
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cmt_timer_stop(0);
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set_timer(CMT_TIMER_RESET);
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cmt0_timer = 0;
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cmt_timer_start(0);
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}
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void __udelay(unsigned long usec)
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{
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unsigned long end = get_usec() + usec;
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while (get_usec() < end)
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continue;
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}
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unsigned long get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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