mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 10:59:43 +09:00
716ece1de9
This patch adds support for the AVR32 LCD controller. This patch is based off the latest u-boot-video. A quick summary of what's going on:- Enable LCDC pixel clock Enable LCDC port pins Add framebuffer pointer to global_data struct Allocate framebuffer To use the new code, update your board config to include something like this:- #define CONFIG_LCD 1 #if defined(CONFIG_LCD) #define CONFIG_CMD_BMP #define CONFIG_ATMEL_LCD 1 #define LCD_BPP LCD_COLOR16 #define CONFIG_BMP_16BPP 1 #define CONFIG_FB_ADDR 0x10600000 #define CONFIG_WHITE_ON_BLACK 1 #define CONFIG_VIDEO_BMP_GZIP 1 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 #define CONFIG_ATMEL_LCD_BGR555 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define CONFIG_SPLASH_SCREEN 1 #endif The standard U-Boot BMP and Splash-screen features should just work. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> [agust@denx.de: fixed some style issues] Signed-off-by: Anatolij Gustschin <agust@denx.de>
93 lines
3.0 KiB
C
93 lines
3.0 KiB
C
/*
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* Copyright (C) 2006, 2008 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_AVR32_ARCH_PORTMUX_H__
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#define __ASM_AVR32_ARCH_PORTMUX_H__
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#include <asm/arch/gpio.h>
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#define PORTMUX_PORT_A ((void *)PIOA_BASE)
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#define PORTMUX_PORT_B ((void *)PIOB_BASE)
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#define PORTMUX_PORT_C ((void *)PIOC_BASE)
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#define PORTMUX_PORT_D ((void *)PIOD_BASE)
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#define PORTMUX_PORT_E ((void *)PIOE_BASE)
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void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,
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unsigned long flags, unsigned long drive_strength);
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#define PORTMUX_EBI_CS(x) (1 << (x))
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#define PORTMUX_EBI_NAND (1 << 6)
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#define PORTMUX_EBI_CF(x) (1 << ((x) + 7))
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#define PORTMUX_EBI_NWAIT (1 << 9)
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#ifdef AT32AP700x_CHIP_HAS_USART
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static inline void portmux_enable_usart0(unsigned long drive_strength)
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{
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portmux_select_peripheral(PORTMUX_PORT_A, (1 << 8) | (1 << 9),
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PORTMUX_FUNC_B, 0);
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}
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static inline void portmux_enable_usart1(unsigned long drive_strength)
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{
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portmux_select_peripheral(PORTMUX_PORT_A, (1 << 17) | (1 << 18),
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PORTMUX_FUNC_A, 0);
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}
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static inline void portmux_enable_usart2(unsigned long drive_strength)
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{
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portmux_select_peripheral(PORTMUX_PORT_B, (1 << 26) | (1 << 27),
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PORTMUX_FUNC_B, 0);
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}
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static inline void portmux_enable_usart3(unsigned long drive_strength)
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{
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portmux_select_peripheral(PORTMUX_PORT_B, (1 << 17) | (1 << 18),
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PORTMUX_FUNC_B, 0);
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}
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#endif
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#ifdef AT32AP700x_CHIP_HAS_MACB
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void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength);
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void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength);
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#define PORTMUX_MACB_RMII (0)
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#define PORTMUX_MACB_MII (1 << 0)
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#define PORTMUX_MACB_SPEED (1 << 1)
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#endif
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#ifdef AT32AP700x_CHIP_HAS_MMCI
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void portmux_enable_mmci(unsigned int slot, unsigned long flags,
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unsigned long drive_strength);
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#define PORTMUX_MMCI_4BIT (1 << 0)
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#define PORTMUX_MMCI_8BIT (PORTMUX_MMCI_4BIT | (1 << 1))
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#define PORTMUX_MMCI_EXT_PULLUP (1 << 2)
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#endif
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#ifdef AT32AP700x_CHIP_HAS_SPI
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void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength);
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void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength);
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#endif
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#ifdef AT32AP700x_CHIP_HAS_LCDC
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void portmux_enable_lcdc(int pin_config);
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#endif
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#endif /* __ASM_AVR32_ARCH_PORTMUX_H__ */
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