mirror of
https://github.com/brain-hackers/u-boot-brain
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77dd7c6854
On x86 platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the time since reset. This particularly affects bootstage. Change the default to not read the timer base, leaving it at 0. Add an option for when U-Boot is the secondary bootloader. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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| .. | ||
| ag101p_timer.c | ||
| altera_timer.c | ||
| arc_timer.c | ||
| ast_timer.c | ||
| atcpit100_timer.c | ||
| atmel_pit_timer.c | ||
| cadence-ttc.c | ||
| dw-apb-timer.c | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_timer.c | ||
| mtk_timer.c | ||
| omap-timer.c | ||
| ostm_timer.c | ||
| riscv_timer.c | ||
| rockchip_timer.c | ||
| sandbox_timer.c | ||
| sti-timer.c | ||
| stm32_timer.c | ||
| timer-uclass.c | ||
| tsc_timer.c | ||