mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
77dd7c6854
On x86 platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the time since reset. This particularly affects bootstage. Change the default to not read the timer base, leaving it at 0. Add an option for when U-Boot is the secondary bootloader. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
21 lines
360 B
Plaintext
21 lines
360 B
Plaintext
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
# Copyright (C) 2019 Intel Corporation <www.intel.com>
|
|
|
|
config SYS_SLIMBOOTLOADER
|
|
bool
|
|
select USE_HOB
|
|
imply SYS_NS16550
|
|
imply AHCI_PCI
|
|
imply SCSI
|
|
imply SCSI_AHCI
|
|
imply MMC
|
|
imply MMC_PCI
|
|
imply MMC_SDHCI
|
|
imply MMC_SDHCI_SDMA
|
|
imply USB
|
|
imply USB_EHCI_HCD
|
|
imply USB_XHCI_HCD
|
|
imply E1000
|
|
imply X86_TSC_READ_BASE
|