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https://github.com/brain-hackers/u-boot-brain
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![Guillaume La Roque](/assets/img/avatar_default.png)
drive-strength-microamp is a new feature needed for G12A SoC. the default DS setting after boot is usually 500uA and it is not enough for many functions. We need to be able to set the drive strength to reliably enable things like MMC, I2C, etc ... Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
185 lines
4.8 KiB
C
185 lines
4.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Jerome Brunet <jbrunet@baylibre.com>
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* Copyright (C) 2017 Xingyu Chen <xingyu.chen@amlogic.com>
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*/
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#include <asm/gpio.h>
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <linux/io.h>
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#include "pinctrl-meson-axg.h"
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static int meson_axg_pmx_get_bank(struct udevice *dev, unsigned int pin,
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struct meson_pmx_bank **bank)
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{
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int i;
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struct meson_pinctrl *priv = dev_get_priv(dev);
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struct meson_axg_pmx_data *pmx = priv->data->pmx_data;
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for (i = 0; i < pmx->num_pmx_banks; i++)
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if (pin >= pmx->pmx_banks[i].first &&
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pin <= pmx->pmx_banks[i].last) {
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*bank = &pmx->pmx_banks[i];
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return 0;
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}
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return -EINVAL;
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}
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static int meson_axg_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
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unsigned int pin,
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unsigned int *reg,
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unsigned int *offset)
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{
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int shift;
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shift = pin - bank->first;
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*reg = bank->reg + (bank->offset + (shift << 2)) / 32;
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*offset = (bank->offset + (shift << 2)) % 32;
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return 0;
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}
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static int meson_axg_pmx_update_function(struct udevice *dev,
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unsigned int pin, unsigned int func)
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{
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struct meson_pinctrl *priv = dev_get_priv(dev);
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struct meson_pmx_bank *bank;
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unsigned int offset;
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unsigned int reg;
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unsigned int tmp;
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int ret;
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ret = meson_axg_pmx_get_bank(dev, pin, &bank);
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if (ret)
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return ret;
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meson_axg_pmx_calc_reg_and_offset(bank, pin, ®, &offset);
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tmp = readl(priv->reg_mux + (reg << 2));
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tmp &= ~(0xf << offset);
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tmp |= (func & 0xf) << offset;
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writel(tmp, priv->reg_mux + (reg << 2));
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return ret;
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}
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static int meson_axg_pinmux_group_set(struct udevice *dev,
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unsigned int group_selector,
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unsigned int func_selector)
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{
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struct meson_pinctrl *priv = dev_get_priv(dev);
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const struct meson_pmx_group *group;
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const struct meson_pmx_func *func;
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struct meson_pmx_axg_data *pmx_data;
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int i, ret;
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group = &priv->data->groups[group_selector];
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pmx_data = (struct meson_pmx_axg_data *)group->data;
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func = &priv->data->funcs[func_selector];
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debug("pinmux: set group %s func %s\n", group->name, func->name);
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for (i = 0; i < group->num_pins; i++) {
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ret = meson_axg_pmx_update_function(dev, group->pins[i],
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pmx_data->func);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int meson_axg_pinmux_get(struct udevice *dev, unsigned int selector,
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char *buf, int size)
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{
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struct meson_pinctrl *priv = dev_get_priv(dev);
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struct meson_pmx_axg_data *pmx_data;
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struct meson_pmx_group *group;
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struct meson_pmx_bank *bank;
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unsigned int offset;
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unsigned int func;
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unsigned int reg;
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int ret, i, j;
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selector += priv->data->pin_base;
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ret = meson_axg_pmx_get_bank(dev, selector, &bank);
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if (ret) {
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snprintf(buf, size, "Unhandled");
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return 0;
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}
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meson_axg_pmx_calc_reg_and_offset(bank, selector, ®, &offset);
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func = (readl(priv->reg_mux + (reg << 2)) >> offset) & 0xf;
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for (i = 0; i < priv->data->num_groups; i++) {
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group = &priv->data->groups[i];
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pmx_data = (struct meson_pmx_axg_data *)group->data;
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if (pmx_data->func != func)
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continue;
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for (j = 0; j < group->num_pins; j++) {
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if (group->pins[j] == selector) {
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snprintf(buf, size, "%s (%x)",
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group->name, func);
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return 0;
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}
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}
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}
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snprintf(buf, size, "Unknown (%x)", func);
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return 0;
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}
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const struct pinconf_param meson_axg_pinconf_params[] = {
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{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
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{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
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{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
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{ "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 },
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};
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const struct pinctrl_ops meson_axg_pinctrl_ops = {
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.get_groups_count = meson_pinctrl_get_groups_count,
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.get_group_name = meson_pinctrl_get_group_name,
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.get_functions_count = meson_pinmux_get_functions_count,
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.get_function_name = meson_pinmux_get_function_name,
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.pinmux_group_set = meson_axg_pinmux_group_set,
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.set_state = pinctrl_generic_set_state,
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.pinconf_params = meson_axg_pinconf_params,
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.pinconf_num_params = ARRAY_SIZE(meson_axg_pinconf_params),
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.pinconf_set = meson_pinconf_set,
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.pinconf_group_set = meson_pinconf_group_set,
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.get_pin_name = meson_pinctrl_get_pin_name,
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.get_pins_count = meson_pinctrl_get_pins_count,
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.get_pin_muxing = meson_axg_pinmux_get,
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};
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static int meson_axg_gpio_request(struct udevice *dev,
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unsigned int offset, const char *label)
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{
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return meson_axg_pmx_update_function(dev->parent, offset, 0);
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}
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static const struct dm_gpio_ops meson_axg_gpio_ops = {
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.request = meson_axg_gpio_request,
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.set_value = meson_gpio_set,
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.get_value = meson_gpio_get,
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.get_function = meson_gpio_get_direction,
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.direction_input = meson_gpio_direction_input,
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.direction_output = meson_gpio_direction_output,
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};
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const struct driver meson_axg_gpio_driver = {
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.name = "meson-axg-gpio",
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.id = UCLASS_GPIO,
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.probe = meson_gpio_probe,
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.ops = &meson_axg_gpio_ops,
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};
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