mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 03:36:16 +09:00
76c3999db4
Accessing powered down peripherals will hang the bus, so check power domain status before initializing SATA and fixup the FDT to disable unused peripherals. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
/*
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* Copyright 2010-2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <common.h>
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#include <ahci.h>
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#include <netdev.h>
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#include <scsi.h>
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#include <asm/sizes.h>
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#include <asm/io.h>
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#define HB_AHCI_BASE 0xffe08000
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#define HB_SREG_A9_PWR_REQ 0xfff3cf00
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#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
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#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
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#define HB_PWR_SUSPEND 0
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#define HB_PWR_SOFT_RESET 1
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#define HB_PWR_HARD_RESET 2
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#define HB_PWR_SHUTDOWN 3
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#define PWRDOM_STAT_SATA 0x80000000
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#define PWRDOM_STAT_PCI 0x40000000
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#define PWRDOM_STAT_EMMC 0x20000000
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init(void)
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{
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icache_enable();
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return 0;
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}
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/* We know all the init functions have been run now */
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_CALXEDA_XGMAC
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rc += calxedaxgmac_initialize(0, 0xfff50000);
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rc += calxedaxgmac_initialize(1, 0xfff51000);
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#endif
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return rc;
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}
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int misc_init_r(void)
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{
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char envbuffer[16];
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u32 boot_choice;
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u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
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if (reg & PWRDOM_STAT_SATA) {
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ahci_init(HB_AHCI_BASE);
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scsi_scan(1);
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}
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boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
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sprintf(envbuffer, "bootcmd%d", boot_choice);
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if (getenv(envbuffer)) {
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sprintf(envbuffer, "run bootcmd%d", boot_choice);
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setenv("bootcmd", envbuffer);
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} else
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setenv("bootcmd", "");
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = SZ_512M;
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *fdt, bd_t *bd)
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{
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static const char disabled[] = "disabled";
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u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
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if (!(reg & PWRDOM_STAT_SATA))
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do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
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disabled, sizeof(disabled), 1);
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if (!(reg & PWRDOM_STAT_EMMC))
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do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
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disabled, sizeof(disabled), 1);
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}
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#endif
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void reset_cpu(ulong addr)
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{
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writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
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wfi();
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}
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