mirror of
https://github.com/brain-hackers/u-boot-brain
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7682a99826
Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: "David Müller" <d.mueller@elsoft.ch> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Torsten Koschorrek <koschorrek@synertronixx.de> Cc: Anatolij Gustschin <agust@denx.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
113 lines
1.8 KiB
ArmAsm
113 lines
1.8 KiB
ArmAsm
/*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <asm/ptrace.h>
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#include <asm/macro.h>
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#include <linux/linkage.h>
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/*
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* Enter Exception.
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* This will save the processor state that is ELR/X0~X30
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* to the stack frame.
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*/
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.macro exception_entry
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stp x29, x30, [sp, #-16]!
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stp x27, x28, [sp, #-16]!
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stp x25, x26, [sp, #-16]!
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stp x23, x24, [sp, #-16]!
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stp x21, x22, [sp, #-16]!
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stp x19, x20, [sp, #-16]!
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stp x17, x18, [sp, #-16]!
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stp x15, x16, [sp, #-16]!
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stp x13, x14, [sp, #-16]!
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stp x11, x12, [sp, #-16]!
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stp x9, x10, [sp, #-16]!
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stp x7, x8, [sp, #-16]!
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stp x5, x6, [sp, #-16]!
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stp x3, x4, [sp, #-16]!
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stp x1, x2, [sp, #-16]!
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/* Could be running at EL3/EL2/EL1 */
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switch_el x11, 3f, 2f, 1f
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3: mrs x1, esr_el3
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mrs x2, elr_el3
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b 0f
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2: mrs x1, esr_el2
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mrs x2, elr_el2
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b 0f
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1: mrs x1, esr_el1
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mrs x2, elr_el1
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0:
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stp x2, x0, [sp, #-16]!
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mov x0, sp
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.endm
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/*
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* Exception vectors.
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*/
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.align 11
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.globl vectors
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vectors:
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.align 7
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b _do_bad_sync /* Current EL Synchronous Thread */
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.align 7
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b _do_bad_irq /* Current EL IRQ Thread */
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.align 7
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b _do_bad_fiq /* Current EL FIQ Thread */
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.align 7
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b _do_bad_error /* Current EL Error Thread */
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.align 7
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b _do_sync /* Current EL Synchronous Handler */
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.align 7
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b _do_irq /* Current EL IRQ Handler */
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.align 7
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b _do_fiq /* Current EL FIQ Handler */
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.align 7
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b _do_error /* Current EL Error Handler */
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_do_bad_sync:
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exception_entry
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bl do_bad_sync
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_do_bad_irq:
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exception_entry
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bl do_bad_irq
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_do_bad_fiq:
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exception_entry
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bl do_bad_fiq
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_do_bad_error:
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exception_entry
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bl do_bad_error
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_do_sync:
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exception_entry
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bl do_sync
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_do_irq:
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exception_entry
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bl do_irq
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_do_fiq:
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exception_entry
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bl do_fiq
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_do_error:
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exception_entry
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bl do_error
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