mirror of
https://github.com/brain-hackers/u-boot-brain
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1a8aae9b94
This patch adds "iRAM, CPU state and low power" configs which are the addresses acting as flag registers. iROM code checks CONFIG_LOWPOWER_FLAG address. If it is equal to CONFIG_LOWPOWER_EN then it jumps to the address (0x02020000+CPUID*4). This is a part of iROM logic. Rest other flags are being used at various places during kernel switching and reset. They are nowhere documented because they are part programming. These configs are serving as flags for us because they are representing the addresses in iRAM which we are using for storing and extracting CPU Status and GIC status. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
58 lines
1.2 KiB
C
58 lines
1.2 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG EXYNOS5420 SoC
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_EXYNOS5420_H
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#define __CONFIG_EXYNOS5420_H
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#define CONFIG_EXYNOS5420
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/* A variant of Exynos5420 (Exynos5 Family) */
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#define CONFIG_EXYNOS5800
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#include <configs/exynos5-common.h>
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#define CONFIG_ARCH_EARLY_INIT_R
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#define MACH_TYPE_SMDK5420 8002
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#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
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#define CONFIG_VAR_SIZE_SPL
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#ifdef CONFIG_VAR_SIZE_SPL
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#define CONFIG_SPL_TEXT_BASE 0x02024410
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#else
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#define CONFIG_SPL_TEXT_BASE 0x02024400
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#endif
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#define CONFIG_IRAM_TOP 0x02074000
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#define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
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#define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi" \
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"exynos5420-peach-pit exynos5420-smdk5420"
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#define CONFIG_MAX_I2C_NUM 11
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#define CONFIG_BOARD_REV_GPIO_COUNT 2
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#define CONFIG_PHY_IRAM_BASE 0x02020000
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/* Address for relocating helper code (Last 4 KB of IRAM) */
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#define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000)
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/*
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* Low Power settings
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*/
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#define CONFIG_LOWPOWER_FLAG 0x02020028
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#define CONFIG_LOWPOWER_ADDR 0x0202002C
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/*
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* Number of CPUs available
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*/
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#define CONFIG_CORE_COUNT 0x8
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#endif /* __CONFIG_EXYNOS5420_H */
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